| Message ID | 20190503091507.6159-1-simon.k.r.goldschmidt@gmail.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 716864586c6261b079a4d5ebc02f19adc8e6aa38 |
| Headers | show |
| Series | arm: socfpga: execute cold reboot by default | expand |
On 5/3/19 4:15 AM, Simon Goldschmidt wrote: > This changes system reboot for socfpga to issue a cold reboot by > default instead of a warm reboot. > > Warm reboot can still be used by setting reboot_mode to > REBOOT_WARM (e.g. via kernel command line 'reboot='), but this > patch ensures cold reboot is issued for both REBOOT_COLD and > REBOOT_HARD. > > Also, cold reboot is more fail safe than warm reboot has some > issues at least fo CSEL=0 and BSEL=qspi, where the boot rom does > not set the qspi clock to a valid range. > > Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> > --- > > See discussion in this thread on the u-boot ML: > https://lists.denx.de/pipermail/u-boot/2019-April/367463.html > --- > arch/arm/mach-socfpga/socfpga.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c > index 816da0eb6..6abfbf140 100644 > --- a/arch/arm/mach-socfpga/socfpga.c > +++ b/arch/arm/mach-socfpga/socfpga.c > @@ -85,10 +85,10 @@ static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) > > temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); > > - if (mode == REBOOT_HARD) > - temp |= RSTMGR_CTRL_SWCOLDRSTREQ; > - else > + if (mode == REBOOT_WARM) > temp |= RSTMGR_CTRL_SWWARMRSTREQ; > + else > + temp |= RSTMGR_CTRL_SWCOLDRSTREQ; > writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); > } > > @@ -98,10 +98,10 @@ static void socfpga_arria10_restart(enum reboot_mode mode, const char *cmd) > > temp = readl(rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); > > - if (mode == REBOOT_HARD) > - temp |= RSTMGR_CTRL_SWCOLDRSTREQ; > - else > + if (mode == REBOOT_WARM) > temp |= RSTMGR_CTRL_SWWARMRSTREQ; > + else > + temp |= RSTMGR_CTRL_SWCOLDRSTREQ; > writel(temp, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); > } > > Applied, thanks! I think this patch needs to get back-ported into stable kernel version as well, right? Dinh
Am 08.05.2019 um 03:37 schrieb Dinh Nguyen: > > > On 5/3/19 4:15 AM, Simon Goldschmidt wrote: >> This changes system reboot for socfpga to issue a cold reboot by >> default instead of a warm reboot. >> >> Warm reboot can still be used by setting reboot_mode to >> REBOOT_WARM (e.g. via kernel command line 'reboot='), but this >> patch ensures cold reboot is issued for both REBOOT_COLD and >> REBOOT_HARD. >> >> Also, cold reboot is more fail safe than warm reboot has some >> issues at least fo CSEL=0 and BSEL=qspi, where the boot rom does >> not set the qspi clock to a valid range. >> >> Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> >> --- >> >> See discussion in this thread on the u-boot ML: >> https://lists.denx.de/pipermail/u-boot/2019-April/367463.html >> --- >> arch/arm/mach-socfpga/socfpga.c | 12 ++++++------ >> 1 file changed, 6 insertions(+), 6 deletions(-) >> >> diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c >> index 816da0eb6..6abfbf140 100644 >> --- a/arch/arm/mach-socfpga/socfpga.c >> +++ b/arch/arm/mach-socfpga/socfpga.c >> @@ -85,10 +85,10 @@ static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) >> >> temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); >> >> - if (mode == REBOOT_HARD) >> - temp |= RSTMGR_CTRL_SWCOLDRSTREQ; >> - else >> + if (mode == REBOOT_WARM) >> temp |= RSTMGR_CTRL_SWWARMRSTREQ; >> + else >> + temp |= RSTMGR_CTRL_SWCOLDRSTREQ; >> writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); >> } >> >> @@ -98,10 +98,10 @@ static void socfpga_arria10_restart(enum reboot_mode mode, const char *cmd) >> >> temp = readl(rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); >> >> - if (mode == REBOOT_HARD) >> - temp |= RSTMGR_CTRL_SWCOLDRSTREQ; >> - else >> + if (mode == REBOOT_WARM) >> temp |= RSTMGR_CTRL_SWWARMRSTREQ; >> + else >> + temp |= RSTMGR_CTRL_SWCOLDRSTREQ; >> writel(temp, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); >> } >> >> > > Applied, thanks! I think this patch needs to get back-ported into stable > kernel version as well, right? Well, it's certainly wrong as it was. But as I saw myself, switching from warm to cold reset might have some implications that would at least in some configurations require changes to existing configurations to keep the board booting. So while this certainly fixes a bug (warm reboot is executed instead of cold reboot like standard/requested), I don't know what's the standard procedure for a backport regarding fix vs. breaking boards. Regards, Simon
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c index 816da0eb6..6abfbf140 100644 --- a/arch/arm/mach-socfpga/socfpga.c +++ b/arch/arm/mach-socfpga/socfpga.c @@ -85,10 +85,10 @@ static void socfpga_cyclone5_restart(enum reboot_mode mode, const char *cmd) temp = readl(rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); - if (mode == REBOOT_HARD) - temp |= RSTMGR_CTRL_SWCOLDRSTREQ; - else + if (mode == REBOOT_WARM) temp |= RSTMGR_CTRL_SWWARMRSTREQ; + else + temp |= RSTMGR_CTRL_SWCOLDRSTREQ; writel(temp, rst_manager_base_addr + SOCFPGA_RSTMGR_CTRL); } @@ -98,10 +98,10 @@ static void socfpga_arria10_restart(enum reboot_mode mode, const char *cmd) temp = readl(rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); - if (mode == REBOOT_HARD) - temp |= RSTMGR_CTRL_SWCOLDRSTREQ; - else + if (mode == REBOOT_WARM) temp |= RSTMGR_CTRL_SWWARMRSTREQ; + else + temp |= RSTMGR_CTRL_SWCOLDRSTREQ; writel(temp, rst_manager_base_addr + SOCFPGA_A10_RSTMGR_CTRL); }
This changes system reboot for socfpga to issue a cold reboot by default instead of a warm reboot. Warm reboot can still be used by setting reboot_mode to REBOOT_WARM (e.g. via kernel command line 'reboot='), but this patch ensures cold reboot is issued for both REBOOT_COLD and REBOOT_HARD. Also, cold reboot is more fail safe than warm reboot has some issues at least fo CSEL=0 and BSEL=qspi, where the boot rom does not set the qspi clock to a valid range. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> --- See discussion in this thread on the u-boot ML: https://lists.denx.de/pipermail/u-boot/2019-April/367463.html --- arch/arm/mach-socfpga/socfpga.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)