diff mbox series

clk: imx: imx8mm: correct audio_pll2_clk to audio_pll2_out

Message ID 20190522014832.29485-1-peng.fan@nxp.com (mailing list archive)
State New, archived
Headers show
Series clk: imx: imx8mm: correct audio_pll2_clk to audio_pll2_out | expand

Commit Message

Peng Fan May 22, 2019, 1:34 a.m. UTC
There is no audio_pll2_clk registered, it should be audio_pll2_out.

Cc: <stable@vger.kernel.org>
Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for imx8mm")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-imx8mm.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Shawn Guo May 23, 2019, 1:22 p.m. UTC | #1
On Wed, May 22, 2019 at 01:34:46AM +0000, Peng Fan wrote:
> There is no audio_pll2_clk registered, it should be audio_pll2_out.
> 
> Cc: <stable@vger.kernel.org>
> Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for imx8mm")
> Signed-off-by: Peng Fan <peng.fan@nxp.com>

Stephen,

I leave this to you, since it's a fix.

Shawn

> ---
>  drivers/clk/imx/clk-imx8mm.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
> index 1ef8438e3d6d..3a889846a05c 100644
> --- a/drivers/clk/imx/clk-imx8mm.c
> +++ b/drivers/clk/imx/clk-imx8mm.c
> @@ -325,7 +325,7 @@ static const char *imx8mm_dsi_dbi_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll
>  					    "sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out", "video_pll1_out", };
>  
>  static const char *imx8mm_usdhc3_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
> -					   "sys_pll3_out", "sys_pll1_266m", "audio_pll2_clk", "sys_pll1_100m", };
> +					   "sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", };
>  
>  static const char *imx8mm_csi1_core_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll2_250m", "sys_pll1_800m",
>  					      "sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out", "video_pll1_out", };
> @@ -361,11 +361,11 @@ static const char *imx8mm_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audio_pll1_
>  					"sys_pll2_1000m", "sys_pll3_out", "clk_ext3", "audio_pll2_out", };
>  
>  static const char *imx8mm_vpu_h1_sels[] = {"osc_24m", "vpu_pll_out", "sys_pll1_800m", "sys_pll2_1000m",
> -					   "audio_pll2_clk", "sys_pll2_125m", "sys_pll3_clk", "audio_pll1_out", };
> +					   "audio_pll2_out", "sys_pll2_125m", "sys_pll3_clk", "audio_pll1_out", };
>  
>  static const char *imx8mm_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
>  
> -static const char *imx8mm_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m", "sys_pll1_200m", "audio_pll2_clk",
> +static const char *imx8mm_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m", "sys_pll1_200m", "audio_pll2_out",
>  					 "vpu_pll", "sys_pll1_80m", };
>  
>  static struct clk *clks[IMX8MM_CLK_END];
> -- 
> 2.16.4
>
Stephen Boyd May 29, 2019, 11:35 p.m. UTC | #2
Quoting Shawn Guo (2019-05-23 06:22:36)
> On Wed, May 22, 2019 at 01:34:46AM +0000, Peng Fan wrote:
> > There is no audio_pll2_clk registered, it should be audio_pll2_out.
> > 
> > Cc: <stable@vger.kernel.org>
> > Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for imx8mm")
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> 
> Stephen,
> 
> I leave this to you, since it's a fix.
> 

Is it a critical fix? Or is it an annoyance that can wait in -next until
the next merge window?
Peng Fan May 30, 2019, 1:22 a.m. UTC | #3
Hi Stephen,

> Subject: Re: [PATCH] clk: imx: imx8mm: correct audio_pll2_clk to
> audio_pll2_out
> 
> Quoting Shawn Guo (2019-05-23 06:22:36)
> > On Wed, May 22, 2019 at 01:34:46AM +0000, Peng Fan wrote:
> > > There is no audio_pll2_clk registered, it should be audio_pll2_out.
> > >
> > > Cc: <stable@vger.kernel.org>
> > > Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for imx8mm")
> > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> >
> > Stephen,
> >
> > I leave this to you, since it's a fix.
> >
> 
> Is it a critical fix? Or is it an annoyance that can wait in -next until the next
> merge window?

I did not run into issue without this fix currently, so it should be fine to wait
in -next until the next merge window.

Thanks,
Peng.
Shawn Guo May 31, 2019, 7:46 a.m. UTC | #4
On Thu, May 30, 2019 at 01:22:57AM +0000, Peng Fan wrote:
> Hi Stephen,
> 
> > Subject: Re: [PATCH] clk: imx: imx8mm: correct audio_pll2_clk to
> > audio_pll2_out
> > 
> > Quoting Shawn Guo (2019-05-23 06:22:36)
> > > On Wed, May 22, 2019 at 01:34:46AM +0000, Peng Fan wrote:
> > > > There is no audio_pll2_clk registered, it should be audio_pll2_out.
> > > >
> > > > Cc: <stable@vger.kernel.org>
> > > > Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for imx8mm")
> > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > >
> > > Stephen,
> > >
> > > I leave this to you, since it's a fix.
> > >
> > 
> > Is it a critical fix? Or is it an annoyance that can wait in -next until the next
> > merge window?
> 
> I did not run into issue without this fix currently, so it should be fine to wait
> in -next until the next merge window.

I was trying to pick up the patch, but the base64 Content-Transfer-Encoding
make the applying difficult.  Please talk to NXP colleague Anson Huang
<Anson.Huang@nxp.com> to find out how to fix it.

https://patchwork.kernel.org/patch/10944169/#22656941

Shawn
Peng Fan May 31, 2019, 7:56 a.m. UTC | #5
Hi Shawn,

> Subject: Re: [PATCH] clk: imx: imx8mm: correct audio_pll2_clk to
> audio_pll2_out
> 
> On Thu, May 30, 2019 at 01:22:57AM +0000, Peng Fan wrote:
> > Hi Stephen,
> >
> > > Subject: Re: [PATCH] clk: imx: imx8mm: correct audio_pll2_clk to
> > > audio_pll2_out
> > >
> > > Quoting Shawn Guo (2019-05-23 06:22:36)
> > > > On Wed, May 22, 2019 at 01:34:46AM +0000, Peng Fan wrote:
> > > > > There is no audio_pll2_clk registered, it should be audio_pll2_out.
> > > > >
> > > > > Cc: <stable@vger.kernel.org>
> > > > > Fixes: ba5625c3e27 ("clk: imx: Add clock driver support for
> > > > > imx8mm")
> > > > > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > > >
> > > > Stephen,
> > > >
> > > > I leave this to you, since it's a fix.
> > > >
> > >
> > > Is it a critical fix? Or is it an annoyance that can wait in -next
> > > until the next merge window?
> >
> > I did not run into issue without this fix currently, so it should be
> > fine to wait in -next until the next merge window.
> 
> I was trying to pick up the patch, but the base64 Content-Transfer-Encoding
> make the applying difficult.  Please talk to NXP colleague Anson Huang
> <Anson.Huang@nxp.com> to find out how to fix it.

This patch was sent out before we find workaround in our IT.
Sorry for inconvenience. Patch was resent just now,
https://patchwork.kernel.org/patch/10969743/

Thanks,
Peng.

> 
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatch
> work.kernel.org%2Fpatch%2F10944169%2F%2322656941&amp;data=02%7C
> 01%7Cpeng.fan%40nxp.com%7Ca54e9a2a6ebf4411be7808d6e59c4c2e%7C6
> 86ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C636948856849287143&
> amp;sdata=9ONV36WZT2owv07e%2Faf2IzQU5KzRE3S111joTBzsXJQ%3D&a
> mp;reserved=0
> 
> Shawn
diff mbox series

Patch

diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c
index 1ef8438e3d6d..3a889846a05c 100644
--- a/drivers/clk/imx/clk-imx8mm.c
+++ b/drivers/clk/imx/clk-imx8mm.c
@@ -325,7 +325,7 @@  static const char *imx8mm_dsi_dbi_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll
 					    "sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out", "video_pll1_out", };
 
 static const char *imx8mm_usdhc3_sels[] = {"osc_24m", "sys_pll1_400m", "sys_pll1_800m", "sys_pll2_500m",
-					   "sys_pll3_out", "sys_pll1_266m", "audio_pll2_clk", "sys_pll1_100m", };
+					   "sys_pll3_out", "sys_pll1_266m", "audio_pll2_out", "sys_pll1_100m", };
 
 static const char *imx8mm_csi1_core_sels[] = {"osc_24m", "sys_pll1_266m", "sys_pll2_250m", "sys_pll1_800m",
 					      "sys_pll2_1000m", "sys_pll3_out", "audio_pll2_out", "video_pll1_out", };
@@ -361,11 +361,11 @@  static const char *imx8mm_pdm_sels[] = {"osc_24m", "sys_pll2_100m", "audio_pll1_
 					"sys_pll2_1000m", "sys_pll3_out", "clk_ext3", "audio_pll2_out", };
 
 static const char *imx8mm_vpu_h1_sels[] = {"osc_24m", "vpu_pll_out", "sys_pll1_800m", "sys_pll2_1000m",
-					   "audio_pll2_clk", "sys_pll2_125m", "sys_pll3_clk", "audio_pll1_out", };
+					   "audio_pll2_out", "sys_pll2_125m", "sys_pll3_clk", "audio_pll1_out", };
 
 static const char *imx8mm_dram_core_sels[] = {"dram_pll_out", "dram_alt_root", };
 
-static const char *imx8mm_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m", "sys_pll1_200m", "audio_pll2_clk",
+static const char *imx8mm_clko1_sels[] = {"osc_24m", "sys_pll1_800m", "osc_27m", "sys_pll1_200m", "audio_pll2_out",
 					 "vpu_pll", "sys_pll1_80m", };
 
 static struct clk *clks[IMX8MM_CLK_END];