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Sun, 26 May 2019 15:25:43 -0700 (PDT) From: =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= To: Mauro Carvalho Chehab , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai Subject: [PATCH v2 01/10] dt-bindings: media: sunxi-ir: add A31 compatible Date: Mon, 27 May 2019 00:25:27 +0200 Message-Id: <20190526222536.10917-2-peron.clem@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190526222536.10917-1-peron.clem@gmail.com> References: <20190526222536.10917-1-peron.clem@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190526_152551_151169_264F766F X-CRM114-Status: GOOD ( 15.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com, =?utf-8?b?Q2zDqW1lbnQgUMOpcm9u?= , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Allwinner A31 has introduced a new memory mapping and a reset line. The difference in memory mapping are : - In the configure register there is a new sample bit and Allwinner has introduced the active threshold feature. - In the status register a new STAT bit is present. Note: CGPO and DRQ_EN bits are removed on A31 but present on A13 and on new SoCs like A64/H6. This is actually not an issue as these bits are togglable and new SoCs have a dedicated bindings. Introduce this bindings to make a difference since this generation. And declare the reset line required since A31. Signed-off-by: Clément Péron --- Documentation/devicetree/bindings/media/sunxi-ir.txt | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/sunxi-ir.txt b/Documentation/devicetree/bindings/media/sunxi-ir.txt index 278098987edb..2e59a32a7e33 100644 --- a/Documentation/devicetree/bindings/media/sunxi-ir.txt +++ b/Documentation/devicetree/bindings/media/sunxi-ir.txt @@ -1,16 +1,21 @@ Device-Tree bindings for SUNXI IR controller found in sunXi SoC family Required properties: -- compatible : "allwinner,sun4i-a10-ir" or "allwinner,sun5i-a13-ir" +- compatible : + "allwinner,sun4i-a10-ir" + "allwinner,sun5i-a13-ir" + "allwinner,sun6i-a31-ir" - clocks : list of clock specifiers, corresponding to entries in clock-names property; - clock-names : should contain "apb" and "ir" entries; - interrupts : should contain IR IRQ number; - reg : should contain IO map address for IR. +Required properties since A31: +- resets : phandle + reset specifier pair + Optional properties: - linux,rc-map-name: see rc.txt file in the same directory. -- resets : phandle + reset specifier pair - clock-frequency : IR Receiver clock frequency, in Hertz. Defaults to 8 MHz if missing.