Message ID | 20190621070720.12395-4-Anson.Huang@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/4] arm64: Enable TIMER_IMX_SYS_CTR for ARCH_MXC platforms | expand |
On 21.06.19 09:07, Anson.Huang@nxp.com wrote: > From: Anson Huang <Anson.Huang@nxp.com> > > Add i.MX8MM system counter node to enable timer-imx-sysctr > broadcast timer driver. > do we need similar additions to imx8mq? If so, I think these would fit in here too. thanks, martin
Hi, Martin > -----Original Message----- > From: Martin Kepplinger <martink@posteo.de> > Sent: Saturday, June 22, 2019 8:10 PM > To: Anson Huang <anson.huang@nxp.com>; catalin.marinas@arm.com; > will@kernel.org; robh+dt@kernel.org; mark.rutland@arm.com; > shawnguo@kernel.org; s.hauer@pengutronix.de; kernel@pengutronix.de; > festevam@gmail.com; mturquette@baylibre.com; sboyd@kernel.org; > Leonard Crestez <leonard.crestez@nxp.com>; Aisheng Dong > <aisheng.dong@nxp.com>; Jacky Bai <ping.bai@nxp.com>; Daniel Baluta > <daniel.baluta@nxp.com>; Peng Fan <peng.fan@nxp.com>; Abel Vesa > <abel.vesa@nxp.com>; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; devicetree@vger.kernel.org; linux- > clk@vger.kernel.org > Cc: dl-linux-imx <linux-imx@nxp.com> > Subject: Re: [PATCH 4/4] arm64: dts: imx8mm: Add system counter node > > On 21.06.19 09:07, Anson.Huang@nxp.com wrote: > > From: Anson Huang <Anson.Huang@nxp.com> > > > > Add i.MX8MM system counter node to enable timer-imx-sysctr broadcast > > timer driver. > > > > > do we need similar additions to imx8mq? If so, I think these would fit in here > too. i.MX8MQ has something different about system counter driver enablement, I did it in another patch series. Anson. > > thanks, > martin
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 232a741..f606efa 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -510,6 +510,15 @@ #pwm-cells = <2>; status = "disabled"; }; + + system_counter: timer@306a0000 { + compatible = "nxp,sysctr-timer"; + reg = <0x306a0000 0x30000>; + interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_SYS_CTR>; + clock-names = "per"; + }; }; aips3: bus@30800000 {