| Message ID | 20190621112306.17769-1-yamada.masahiro@socionext.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | c1459a9d7e920b045aa3eb458ee099dc76f50502 |
| Headers | show |
| Series | ARM: dts: socfpga: update to new Denali NAND binding | expand |
On 6/21/19 6:23 AM, Masahiro Yamada wrote: > With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller > and NAND chips"), the Denali NAND controller driver migrated to the > new controller/chip representation. > > Update DT for it. > > Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> > --- > > arch/arm/boot/dts/socfpga.dtsi | 2 +- > arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- > .../boot/dts/socfpga_arria10_socdk_nand.dts | 20 ++++++++++++------- > 3 files changed, 15 insertions(+), 9 deletions(-) > Applied! Thanks! Dinh
On Tue, Jun 25, 2019 at 12:39 AM Dinh Nguyen <dinguyen@kernel.org> wrote: > > > > On 6/21/19 6:23 AM, Masahiro Yamada wrote: > > With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller > > and NAND chips"), the Denali NAND controller driver migrated to the > > new controller/chip representation. > > > > Update DT for it. > > > > Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> > > --- > > > > arch/arm/boot/dts/socfpga.dtsi | 2 +- > > arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- > > .../boot/dts/socfpga_arria10_socdk_nand.dts | 20 ++++++++++++------- > > 3 files changed, 15 insertions(+), 9 deletions(-) > > > > Applied! Thanks! > > Dinh You did not send this to upstream for v5.3-rc1. Which version is this aiming for?
On 8/19/19 1:17 AM, Masahiro Yamada wrote: > On Tue, Jun 25, 2019 at 12:39 AM Dinh Nguyen <dinguyen@kernel.org> wrote: >> >> >> >> On 6/21/19 6:23 AM, Masahiro Yamada wrote: >>> With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller >>> and NAND chips"), the Denali NAND controller driver migrated to the >>> new controller/chip representation. >>> >>> Update DT for it. >>> >>> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> >>> --- >>> >>> arch/arm/boot/dts/socfpga.dtsi | 2 +- >>> arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- >>> .../boot/dts/socfpga_arria10_socdk_nand.dts | 20 ++++++++++++------- >>> 3 files changed, 15 insertions(+), 9 deletions(-) >>> >> >> Applied! Thanks! >> >> Dinh > > > You did not send this to upstream for v5.3-rc1. > > Which version is this aiming for? > Yes, I apologize but I missed the 5.3 window. It'll be in 5.4. Dinh
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index ec1966480f2f..90d6d0d4417d 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -747,7 +747,7 @@ nand0: nand@ff900000 { #address-cells = <0x1>; - #size-cells = <0x1>; + #size-cells = <0x0>; compatible = "altr,socfpga-denali-nand"; reg = <0xff900000 0x100000>, <0xffb80000 0x10000>; diff --git a/arch/arm/boot/dts/socfpga_arria10.dtsi b/arch/arm/boot/dts/socfpga_arria10.dtsi index ae24599d5829..677394153f4d 100644 --- a/arch/arm/boot/dts/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/socfpga_arria10.dtsi @@ -659,7 +659,7 @@ nand: nand@ffb90000 { #address-cells = <1>; - #size-cells = <1>; + #size-cells = <0>; compatible = "altr,socfpga-denali-nand"; reg = <0xffb90000 0x72000>, <0xffb80000 0x10000>; diff --git a/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts index e36e0a0f8aa6..9bd9e04c7361 100644 --- a/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts +++ b/arch/arm/boot/dts/socfpga_arria10_socdk_nand.dts @@ -9,12 +9,18 @@ &nand { status = "okay"; - partition@nand-boot { - label = "Boot and fpga data"; - reg = <0x0 0x1C00000>; - }; - partition@nand-rootfs { - label = "Root Filesystem - JFFS2"; - reg = <0x1C00000 0x6400000>; + nand@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Boot and fpga data"; + reg = <0x0 0x1C00000>; + }; + partition@1c00000 { + label = "Root Filesystem - JFFS2"; + reg = <0x1C00000 0x6400000>; + }; }; };
With commit d8e8fd0ebf8b ("mtd: rawnand: denali: decouple controller and NAND chips"), the Denali NAND controller driver migrated to the new controller/chip representation. Update DT for it. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> --- arch/arm/boot/dts/socfpga.dtsi | 2 +- arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +- .../boot/dts/socfpga_arria10_socdk_nand.dts | 20 ++++++++++++------- 3 files changed, 15 insertions(+), 9 deletions(-)