| Message ID | 20190627080116.40264-5-jitao.shi@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Support dsi for mt8183 | expand |
Hi, Jitao: On Thu, 2019-06-27 at 16:01 +0800, Jitao Shi wrote: > Our new DSI chip has frame size control. > So add the driver data to control for different chips. > > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > Reviewed-by: CK Hu <ck.hu@mediatek.com> This version is different than previous version, so you should remove the reviewed-by tag. For this version, I still give you a Reviewed-by: CK Hu <ck.hu@mediatek.com> > --- > drivers/gpu/drm/mediatek/mtk_dsi.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c > index 6b6550926db6..45e331055842 100644 > --- a/drivers/gpu/drm/mediatek/mtk_dsi.c > +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c > @@ -78,6 +78,7 @@ > #define DSI_VBP_NL 0x24 > #define DSI_VFP_NL 0x28 > #define DSI_VACT_NL 0x2C > +#define DSI_SIZE_CON 0x38 > #define DSI_HSA_WC 0x50 > #define DSI_HBP_WC 0x54 > #define DSI_HFP_WC 0x58 > @@ -162,6 +163,7 @@ struct phy; > struct mtk_dsi_driver_data { > const u32 reg_cmdq_off; > bool has_shadow_ctl; > + bool has_size_ctl; > }; > > struct mtk_dsi { > @@ -430,6 +432,10 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) > writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL); > writel(vm->vactive, dsi->regs + DSI_VACT_NL); > > + if (dsi->driver_data->has_size_ctl) > + writel(vm->vactive << 16 | vm->hactive, > + dsi->regs + DSI_SIZE_CON); > + > horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); > > if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c index 6b6550926db6..45e331055842 100644 --- a/drivers/gpu/drm/mediatek/mtk_dsi.c +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c @@ -78,6 +78,7 @@ #define DSI_VBP_NL 0x24 #define DSI_VFP_NL 0x28 #define DSI_VACT_NL 0x2C +#define DSI_SIZE_CON 0x38 #define DSI_HSA_WC 0x50 #define DSI_HBP_WC 0x54 #define DSI_HFP_WC 0x58 @@ -162,6 +163,7 @@ struct phy; struct mtk_dsi_driver_data { const u32 reg_cmdq_off; bool has_shadow_ctl; + bool has_size_ctl; }; struct mtk_dsi { @@ -430,6 +432,10 @@ static void mtk_dsi_config_vdo_timing(struct mtk_dsi *dsi) writel(vm->vfront_porch, dsi->regs + DSI_VFP_NL); writel(vm->vactive, dsi->regs + DSI_VACT_NL); + if (dsi->driver_data->has_size_ctl) + writel(vm->vactive << 16 | vm->hactive, + dsi->regs + DSI_SIZE_CON); + horizontal_sync_active_byte = (vm->hsync_len * dsi_tmp_buf_bpp - 10); if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)