From patchwork Thu Jun 27 08:35:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Murray X-Patchwork-Id: 11019127 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7EA72924 for ; Thu, 27 Jun 2019 08:35:55 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6DB1E28716 for ; Thu, 27 Jun 2019 08:35:55 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 60E9728738; Thu, 27 Jun 2019 08:35:55 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 04B1128716 for ; Thu, 27 Jun 2019 08:35:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=NbOFehKiUjOK4XYQ7eO6PSrlbGFfQwW2Clfj7IQhGoU=; b=CHh7jFqzAbJ236 jqxfmLbSPZX6VNJC3f/ZckC1fGhXhjP5OVR7r7Ys/geFX2N7mzrPhY/ANqkBV5O3wkHfLExM16Yge zDVqvIaSJy/u60KBbLeqlb6yTAXKFBpIIoWqeejhY6byyfQje4TxVBnrKfuNFVAJsEmFpkXV3OFlQ ra9Hx6boHadYrCBh1SaRl1TnTWjUYqp8fCin+/Hnpl1xeJeJjdP6Ju9VWYBLGzfrAWd9OhrLyPApi s836FEmXHr5B/jZ5h93SpBj7PZ1ykJHapB/YdW3Fyw1At82SgcHFpfSshILuM0j2ob138BUYeTzIe CkfE78Dity8S7t5ikJDA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hgPso-0005Mi-0c; Thu, 27 Jun 2019 08:35:54 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1hgPsV-00059i-Ha for linux-arm-kernel@lists.infradead.org; Thu, 27 Jun 2019 08:35:36 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 095982B; Thu, 27 Jun 2019 01:35:35 -0700 (PDT) Received: from e119886-lin.cambridge.arm.com (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 79E733F706; Thu, 27 Jun 2019 01:35:32 -0700 (PDT) From: Andrew Murray To: Mathieu Poirier , Suzuki K Poulose , Alexander Shishkin Subject: [PATCH v2 2/5] coresight: etm4x: use explicit barriers on enable/disable Date: Thu, 27 Jun 2019 09:35:22 +0100 Message-Id: <20190627083525.37463-3-andrew.murray@arm.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190627083525.37463-1-andrew.murray@arm.com> References: <20190627083525.37463-1-andrew.murray@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190627_013535_651006_C7A3B29B X-CRM114-Status: GOOD ( 11.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: coresight@lists.linaro.org, Sudeep Holla , stable@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mike Leach Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP Synchronization is recommended before disabling the trace registers to prevent any start or stop points being speculative at the point of disabling the unit (section 7.3.77 of ARM IHI 0064D). Synchronization is also recommended after programming the trace registers to ensure all updates are committed prior to normal code resuming (section 4.3.7 of ARM IHI 0064D). Let's ensure these syncronization points are present in the code and clearly commented. Note that we could rely on the barriers in CS_LOCK and coresight_disclaim_device_unlocked or the context switch to user space - however coresight may be of use in the kernel. Signed-off-by: Andrew Murray CC: stable@vger.kernel.org Reviewed-by: Suzuki K Poulose --- drivers/hwtracing/coresight/coresight-etm4x.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c b/drivers/hwtracing/coresight/coresight-etm4x.c index c89190d464ab..68e8e3954cef 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.c +++ b/drivers/hwtracing/coresight/coresight-etm4x.c @@ -188,6 +188,10 @@ static int etm4_enable_hw(struct etmv4_drvdata *drvdata) dev_err(etm_dev, "timeout while waiting for Idle Trace Status\n"); + /* As recommended by 4.3.7 of ARM IHI 0064D */ + dsb(sy); + isb(); + done: CS_LOCK(drvdata->base); @@ -454,7 +458,8 @@ static void etm4_disable_hw(void *info) control &= ~0x1; /* make sure everything completes before disabling */ - mb(); + /* As recommended by 7.3.77 of ARM IHI 0064D */ + dsb(sy); isb(); writel_relaxed(control, drvdata->base + TRCPRGCTLR);