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[73.69.118.222]) by smtp.gmail.com with ESMTPSA id f20sm8519538qkh.15.2019.07.16.09.56.46 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 16 Jul 2019 09:56:47 -0700 (PDT) From: Pavel Tatashin To: pasha.tatashin@soleen.com, jmorris@namei.org, sashal@kernel.org, ebiederm@xmission.com, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, corbet@lwn.net, catalin.marinas@arm.com, will@kernel.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC v1 4/4] arm64: Keep MMU on while kernel is being relocated Date: Tue, 16 Jul 2019 12:56:41 -0400 Message-Id: <20190716165641.6990-5-pasha.tatashin@soleen.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190716165641.6990-1-pasha.tatashin@soleen.com> References: <20190716165641.6990-1-pasha.tatashin@soleen.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190716_095649_697406_C379A0FC X-CRM114-Status: UNSURE ( 9.57 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP It is inefficient to do kernel relocation with MMU disabled. This is because if MMU is disabled, dcache must also be disabled. Now, that we have identity page table we can disable MMU after relocation is completed. Signed-off-by: Pavel Tatashin --- arch/arm64/kernel/cpu-reset.S | 8 ------- arch/arm64/kernel/relocate_kernel.S | 36 ++++++++++++++++++----------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/arch/arm64/kernel/cpu-reset.S b/arch/arm64/kernel/cpu-reset.S index 6ea337d464c4..d5cfc17b8e1f 100644 --- a/arch/arm64/kernel/cpu-reset.S +++ b/arch/arm64/kernel/cpu-reset.S @@ -30,14 +30,6 @@ * flat identity mapping. */ ENTRY(__cpu_soft_restart) - /* Clear sctlr_el1 flags. */ - mrs x12, sctlr_el1 - ldr x13, =SCTLR_ELx_FLAGS - bic x12, x12, x13 - pre_disable_mmu_workaround - msr sctlr_el1, x12 - isb - cbz x0, 1f // el2_switch? mov x0, #HVC_SOFT_RESTART hvc #0 // no return diff --git a/arch/arm64/kernel/relocate_kernel.S b/arch/arm64/kernel/relocate_kernel.S index c1d7db71a726..e2724fedd082 100644 --- a/arch/arm64/kernel/relocate_kernel.S +++ b/arch/arm64/kernel/relocate_kernel.S @@ -36,18 +36,6 @@ ENTRY(arm64_relocate_new_kernel) mov x14, xzr /* x14 = entry ptr */ mov x13, xzr /* x13 = copy dest */ - /* Clear the sctlr_el2 flags. */ - mrs x0, CurrentEL - cmp x0, #CurrentEL_EL2 - b.ne 1f - mrs x0, sctlr_el2 - ldr x1, =SCTLR_ELx_FLAGS - bic x0, x0, x1 - pre_disable_mmu_workaround - msr sctlr_el2, x0 - isb -1: - /* Check if the new image needs relocation. */ tbnz x16, IND_DONE_BIT, .Ldone @@ -63,10 +51,10 @@ ENTRY(arm64_relocate_new_kernel) add x20, x0, #PAGE_SIZE sub x1, x15, #1 bic x0, x0, x1 -2: dc ivac, x0 +1: dc ivac, x0 add x0, x0, x15 cmp x0, x20 - b.lo 2b + b.lo 1b dsb sy mov x20, x13 @@ -104,6 +92,26 @@ ENTRY(arm64_relocate_new_kernel) dsb nsh isb + /* Clear sctlr_el1 flags. */ + mrs x12, sctlr_el1 + ldr x13, =SCTLR_ELx_FLAGS + bic x12, x12, x13 + pre_disable_mmu_workaround + msr sctlr_el1, x12 + isb + + /* Clear the sctlr_el2 flags. */ + mrs x0, CurrentEL + cmp x0, #CurrentEL_EL2 + b.ne 2f + mrs x0, sctlr_el2 + ldr x1, =SCTLR_ELx_FLAGS + bic x0, x0, x1 + pre_disable_mmu_workaround + msr sctlr_el2, x0 + isb +2: + /* Start new image. */ mov x0, x18 mov x1, xzr