diff mbox series

coresight: tmc-etr: Fix perf_data check.

Message ID 20190809202330.51183-1-yabinc@google.com (mailing list archive)
State New, archived
Headers show
Series coresight: tmc-etr: Fix perf_data check. | expand

Commit Message

Yabin Cui Aug. 9, 2019, 8:23 p.m. UTC
When tracing etm data of multiple threads on multiple cpus through
perf interface, each cpu has a unique etr_perf_buffer while sharing
the same etr device. There is no guarantee that the last cpu starts
etm tracing also stops last. This makes perf_data check fail.

Fix it by checking etr_buf instead of etr_perf_buffer.

Signed-off-by: Yabin Cui <yabinc@google.com>
---
 drivers/hwtracing/coresight/coresight-tmc-etr.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Suzuki K Poulose Aug. 12, 2019, 10:45 a.m. UTC | #1
On 09/08/2019 21:23, Yabin Cui wrote:
> When tracing etm data of multiple threads on multiple cpus through
> perf interface, each cpu has a unique etr_perf_buffer while sharing
> the same etr device. There is no guarantee that the last cpu starts
> etm tracing also stops last. This makes perf_data check fail.
> 
> Fix it by checking etr_buf instead of etr_perf_buffer.

Please could you add a Fixes tag for this:

Fixes: 3147da92a8a81fc3 ("coresight: tmc-etr: Allocate and free ETR memory 
buffers for CPU-wide scenarios")

as the problem was introduced as a side effect of the above patch ?

> 
> Signed-off-by: Yabin Cui <yabinc@google.com>
> ---
>   drivers/hwtracing/coresight/coresight-tmc-etr.c | 4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> index 17006705287a..f466f05afe08 100644
> --- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
> +++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
> @@ -1484,7 +1484,7 @@ tmc_update_etr_buffer(struct coresight_device *csdev,
>   		goto out;
>   	}
>   
> -	if (WARN_ON(drvdata->perf_data != etr_perf)) {
> +	if (WARN_ON(drvdata->perf_data != etr_buf)) {
>   		lost = true;
>   		spin_unlock_irqrestore(&drvdata->spinlock, flags);
>   		goto out;
> @@ -1556,7 +1556,7 @@ static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
>   	}
>   
>   	etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf);
> -	drvdata->perf_data = etr_perf;
> +	drvdata->perf_data = etr_perf->etr_buf;

minor nit: Now that we are storing the etr_buf instead of the etr_perf_buf in
perf_data, we could make the "perf_data" => "perf_buf" inline with the
sysfs_buf.

Either ways:

Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
diff mbox series

Patch

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index 17006705287a..f466f05afe08 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c
@@ -1484,7 +1484,7 @@  tmc_update_etr_buffer(struct coresight_device *csdev,
 		goto out;
 	}
 
-	if (WARN_ON(drvdata->perf_data != etr_perf)) {
+	if (WARN_ON(drvdata->perf_data != etr_buf)) {
 		lost = true;
 		spin_unlock_irqrestore(&drvdata->spinlock, flags);
 		goto out;
@@ -1556,7 +1556,7 @@  static int tmc_enable_etr_sink_perf(struct coresight_device *csdev, void *data)
 	}
 
 	etr_perf->head = PERF_IDX2OFF(handle->head, etr_perf);
-	drvdata->perf_data = etr_perf;
+	drvdata->perf_data = etr_perf->etr_buf;
 
 	/*
 	 * No HW configuration is needed if the sink is already in