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Tue, 13 Aug 2019 07:53:50 -0700 (PDT) From: Georgi Djakov To: linux-pm@vger.kernel.org, evgreen@chromium.org Subject: [PATCH v4 3/3] interconnect: qcom: Add tagging and wake/sleep support for sdm845 Date: Tue, 13 Aug 2019 17:53:41 +0300 Message-Id: <20190813145341.28530-4-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190813145341.28530-1-georgi.djakov@linaro.org> References: <20190813145341.28530-1-georgi.djakov@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190813_075352_812475_9E9575E1 X-CRM114-Status: GOOD ( 19.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: seansw@qti.qualcomm.com, linux-kernel@vger.kernel.org, daidavid1@codeaurora.org, dianders@chromium.org, amit.kucheria@linaro.org, bjorn.andersson@linaro.org, linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org, linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP From: David Dai Add support for wake and sleep commands by using a tag to indicate whether or not the aggregate and set requests fall into execution state specific bucket. Signed-off-by: David Dai Signed-off-by: Georgi Djakov Reviewed-by: Evan Green --- drivers/interconnect/qcom/sdm845.c | 139 ++++++++++++++++++++++------- 1 file changed, 108 insertions(+), 31 deletions(-) diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom/sdm845.c index fb526004c82e..93df67345b39 100644 --- a/drivers/interconnect/qcom/sdm845.c +++ b/drivers/interconnect/qcom/sdm845.c @@ -66,6 +66,22 @@ struct bcm_db { #define SDM845_MAX_BCM_PER_NODE 2 #define SDM845_MAX_VCD 10 +/* + * The AMC bucket denotes constraints that are applied to hardware when + * icc_set_bw() completes, whereas the WAKE and SLEEP constraints are applied + * when the execution environment transitions between active and low power mode. + */ +#define QCOM_ICC_BUCKET_AMC 0 +#define QCOM_ICC_BUCKET_WAKE 1 +#define QCOM_ICC_BUCKET_SLEEP 2 +#define QCOM_ICC_NUM_BUCKETS 3 +#define QCOM_ICC_TAG_AMC BIT(QCOM_ICC_BUCKET_AMC) +#define QCOM_ICC_TAG_WAKE BIT(QCOM_ICC_BUCKET_WAKE) +#define QCOM_ICC_TAG_SLEEP BIT(QCOM_ICC_BUCKET_SLEEP) +#define QCOM_ICC_TAG_ACTIVE_ONLY (QCOM_ICC_TAG_AMC | QCOM_ICC_TAG_WAKE) +#define QCOM_ICC_TAG_ALWAYS (QCOM_ICC_TAG_AMC | QCOM_ICC_TAG_WAKE |\ + QCOM_ICC_TAG_SLEEP) + /** * struct qcom_icc_node - Qualcomm specific interconnect nodes * @name: the node name used in debugfs @@ -86,8 +102,8 @@ struct qcom_icc_node { u16 num_links; u16 channels; u16 buswidth; - u64 sum_avg; - u64 max_peak; + u64 sum_avg[QCOM_ICC_NUM_BUCKETS]; + u64 max_peak[QCOM_ICC_NUM_BUCKETS]; struct qcom_icc_bcm *bcms[SDM845_MAX_BCM_PER_NODE]; size_t num_bcms; }; @@ -112,8 +128,8 @@ struct qcom_icc_bcm { const char *name; u32 type; u32 addr; - u64 vote_x; - u64 vote_y; + u64 vote_x[QCOM_ICC_NUM_BUCKETS]; + u64 vote_y[QCOM_ICC_NUM_BUCKETS]; bool dirty; bool keepalive; struct bcm_db aux_data; @@ -555,7 +571,7 @@ inline void tcs_cmd_gen(struct tcs_cmd *cmd, u64 vote_x, u64 vote_y, cmd->wait = true; } -static void tcs_list_gen(struct list_head *bcm_list, +static void tcs_list_gen(struct list_head *bcm_list, int bucket, struct tcs_cmd tcs_list[SDM845_MAX_VCD], int n[SDM845_MAX_VCD]) { @@ -573,8 +589,8 @@ static void tcs_list_gen(struct list_head *bcm_list, commit = true; cur_vcd_size = 0; } - tcs_cmd_gen(&tcs_list[idx], bcm->vote_x, bcm->vote_y, - bcm->addr, commit); + tcs_cmd_gen(&tcs_list[idx], bcm->vote_x[bucket], + bcm->vote_y[bucket], bcm->addr, commit); idx++; n[batch]++; /* @@ -595,37 +611,55 @@ static void tcs_list_gen(struct list_head *bcm_list, static void bcm_aggregate(struct qcom_icc_bcm *bcm) { - size_t i; - u64 agg_avg = 0; - u64 agg_peak = 0; + size_t i, bucket; + u64 agg_avg[QCOM_ICC_NUM_BUCKETS] = {0}; + u64 agg_peak[QCOM_ICC_NUM_BUCKETS] = {0}; u64 temp; - for (i = 0; i < bcm->num_nodes; i++) { - temp = bcm->nodes[i]->sum_avg * bcm->aux_data.width; - do_div(temp, bcm->nodes[i]->buswidth * bcm->nodes[i]->channels); - agg_avg = max(agg_avg, temp); + for (bucket = 0; bucket < QCOM_ICC_NUM_BUCKETS; bucket++) { + for (i = 0; i < bcm->num_nodes; i++) { + temp = bcm->nodes[i]->sum_avg[bucket] * bcm->aux_data.width; + do_div(temp, bcm->nodes[i]->buswidth * bcm->nodes[i]->channels); + agg_avg[bucket] = max(agg_avg[bucket], temp); - temp = bcm->nodes[i]->max_peak * bcm->aux_data.width; - do_div(temp, bcm->nodes[i]->buswidth); - agg_peak = max(agg_peak, temp); - } + temp = bcm->nodes[i]->max_peak[bucket] * bcm->aux_data.width; + do_div(temp, bcm->nodes[i]->buswidth); + agg_peak[bucket] = max(agg_peak[bucket], temp); + } - temp = agg_avg * 1000ULL; - do_div(temp, bcm->aux_data.unit); - bcm->vote_x = temp; + temp = agg_avg[bucket] * 1000ULL; + do_div(temp, bcm->aux_data.unit); + bcm->vote_x[bucket] = temp; - temp = agg_peak * 1000ULL; - do_div(temp, bcm->aux_data.unit); - bcm->vote_y = temp; + temp = agg_peak[bucket] * 1000ULL; + do_div(temp, bcm->aux_data.unit); + bcm->vote_y[bucket] = temp; + } - if (bcm->keepalive && bcm->vote_x == 0 && bcm->vote_y == 0) { - bcm->vote_x = 1; - bcm->vote_y = 1; + if (bcm->keepalive && bcm->vote_x[QCOM_ICC_BUCKET_AMC] == 0 && + bcm->vote_y[QCOM_ICC_BUCKET_AMC] == 0) { + bcm->vote_x[QCOM_ICC_BUCKET_AMC] = 1; + bcm->vote_x[QCOM_ICC_BUCKET_WAKE] = 1; + bcm->vote_y[QCOM_ICC_BUCKET_AMC] = 1; + bcm->vote_y[QCOM_ICC_BUCKET_WAKE] = 1; } bcm->dirty = false; } +static void qcom_icc_pre_aggregate(struct icc_node *node) +{ + size_t i; + struct qcom_icc_node *qn; + + qn = node->data; + + for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + qn->sum_avg[i] = 0; + qn->max_peak[i] = 0; + } +} + static int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, u32 peak_bw, u32 *agg_avg, u32 *agg_peak) { @@ -634,12 +668,19 @@ static int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, qn = node->data; + if (!tag) + tag = QCOM_ICC_TAG_ALWAYS; + + for (i = 0; i < QCOM_ICC_NUM_BUCKETS; i++) { + if (tag & BIT(i)) { + qn->sum_avg[i] += avg_bw; + qn->max_peak[i] = max_t(u32, qn->max_peak[i], peak_bw); + } + } + *agg_avg += avg_bw; *agg_peak = max_t(u32, *agg_peak, peak_bw); - qn->sum_avg = *agg_avg; - qn->max_peak = *agg_peak; - for (i = 0; i < qn->num_bcms; i++) qn->bcms[i]->dirty = true; @@ -675,7 +716,7 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) * Construct the command list based on a pre ordered list of BCMs * based on VCD. */ - tcs_list_gen(&commit_list, cmds, commit_idx); + tcs_list_gen(&commit_list, QCOM_ICC_BUCKET_AMC, cmds, commit_idx); if (!commit_idx[0]) return ret; @@ -693,6 +734,41 @@ static int qcom_icc_set(struct icc_node *src, struct icc_node *dst) return ret; } + INIT_LIST_HEAD(&commit_list); + + for (i = 0; i < qp->num_bcms; i++) { + /* + * Only generate WAKE and SLEEP commands if a resource's + * requirements change as the execution environment transitions + * between different power states. + */ + if (qp->bcms[i]->vote_x[QCOM_ICC_BUCKET_WAKE] != + qp->bcms[i]->vote_x[QCOM_ICC_BUCKET_SLEEP] || + qp->bcms[i]->vote_y[QCOM_ICC_BUCKET_WAKE] != + qp->bcms[i]->vote_y[QCOM_ICC_BUCKET_SLEEP]) { + list_add_tail(&qp->bcms[i]->list, &commit_list); + } + } + + if (list_empty(&commit_list)) + return ret; + + tcs_list_gen(&commit_list, QCOM_ICC_BUCKET_WAKE, cmds, commit_idx); + + ret = rpmh_write_batch(qp->dev, RPMH_WAKE_ONLY_STATE, cmds, commit_idx); + if (ret) { + pr_err("Error sending WAKE RPMH requests (%d)\n", ret); + return ret; + } + + tcs_list_gen(&commit_list, QCOM_ICC_BUCKET_SLEEP, cmds, commit_idx); + + ret = rpmh_write_batch(qp->dev, RPMH_SLEEP_STATE, cmds, commit_idx); + if (ret) { + pr_err("Error sending SLEEP RPMH requests (%d)\n", ret); + return ret; + } + return ret; } @@ -738,6 +814,7 @@ static int qnoc_probe(struct platform_device *pdev) provider = &qp->provider; provider->dev = &pdev->dev; provider->set = qcom_icc_set; + provider->pre_aggregate = qcom_icc_pre_aggregate; provider->aggregate = qcom_icc_aggregate; provider->xlate = of_icc_xlate_onecell; INIT_LIST_HEAD(&provider->nodes);