From patchwork Mon Aug 26 13:25:52 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoph Hellwig X-Patchwork-Id: 11114625 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 81C6914F7 for ; Mon, 26 Aug 2019 13:28:03 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5F82E2053B for ; Mon, 26 Aug 2019 13:28:03 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="U7xTr2dQ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 5F82E2053B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=lst.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TEUOsiov/p/HgW0xwt9iDfawUuhJfVM8BsZrMcpjHZs=; b=U7xTr2dQff2+cQ 2A/X460XqOkveJNFuyGL55nPg4ow/I2k4mxQH+S3QQANzZnB8FO6wQ6knUp298AXVMgPxvb7ge8Oz +SBcRz6SVOJ8HPp/TpBfHFbeCMkgHy9iDii+/3EpfsNLMspwGuAmNtiFn3Y2q0U8wYTgzGwu7c6SB mro+2iUES+XGDj2+nbnd+qyQ7JeQmhPDKuyi/zVCWRe2vOdepk2Bm97HxjV/zZ93F763Ci2mSoXcx aXLo0fhaMS7UnKiIZvJl2lLDkJYEAKxKboCsDNZauAxjcvA+P883q60oMnqTqhbMjGDJKOxpXMAQH wcMzvllpnKJ4pFrY9exQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92 #3 (Red Hat Linux)) id 1i2F2K-0000fN-W8; Mon, 26 Aug 2019 13:27:57 +0000 Received: from clnet-p19-102.ikbnet.co.at ([83.175.77.102] helo=localhost) by bombadil.infradead.org with esmtpsa (Exim 4.92 #3 (Red Hat Linux)) id 1i2F0e-0007xw-57; Mon, 26 Aug 2019 13:26:12 +0000 From: Christoph Hellwig To: iommu@lists.linux-foundation.org Subject: [PATCH 5/6] arm64: document the choice of page attributes for pgprot_dmacoherent Date: Mon, 26 Aug 2019 15:25:52 +0200 Message-Id: <20190826132553.4116-6-hch@lst.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190826132553.4116-1-hch@lst.de> References: <20190826132553.4116-1-hch@lst.de> MIME-Version: 1.0 X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Shawn Anastasio , Will Deacon , linux-m68k@lists.linux-m68k.org, Guan Xuetao , linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, Russell King , linux-mips@vger.kernel.org, Paul Burton , Geert Uytterhoeven , Catalin Marinas , James Hogan , Robin Murphy , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Based on an email from Will Deacon. Signed-off-by: Christoph Hellwig Acked-by: Will Deacon Acked-by: Mark Rutland --- arch/arm64/include/asm/pgtable.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h index 6700371227d1..fd40fb05eb51 100644 --- a/arch/arm64/include/asm/pgtable.h +++ b/arch/arm64/include/asm/pgtable.h @@ -435,6 +435,14 @@ static inline pmd_t pmd_mkdevmap(pmd_t pmd) __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN) #define pgprot_device(prot) \ __pgprot_modify(prot, PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_DEVICE_nGnRE) | PTE_PXN | PTE_UXN) +/* + * DMA allocations for non-coherent devices use what the Arm architecture calls + * "Normal non-cacheable" memory, which permits speculation, unaligned accesses + * and merging of writes. This is different from "Device-nGnR[nE]" memory which + * is intended for MMIO and thus forbids speculation, preserves access size, + * requires strict alignment and can also force write responses to come from the + * endpoint. + */ #define pgprot_dmacoherent(prot) \ __pgprot_modify(prot, PTE_ATTRINDX_MASK, \ PTE_ATTRINDX(MT_NORMAL_NC) | PTE_PXN | PTE_UXN)