From patchwork Wed Oct 2 15:22:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin GAIGNARD X-Patchwork-Id: 11171345 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6A6EA16B1 for ; Wed, 2 Oct 2019 15:23:14 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 47CEB21D7B for ; Wed, 2 Oct 2019 15:23:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Xln9B0r6"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=st.com header.i=@st.com header.b="Em0ZDgTY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 47CEB21D7B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=esT2LVphZ36PXpam9hTUOsFoY8rjAeKvy+tbdZzjw+I=; b=Xln9B0r6WyEeIT kAZG0HT/j4DEklFBjKVbez37IGCVIm3G1ul1rr7aUoruMxrXC+MuxTtBzYErlnIGTX1lkMbq7ZOts I9nfaJw09aC7Vtgt7YP+srKg76B3Z9OWulF5/CXaxRsR9O8JDBBrLJwCdqYv4WnMADc/D5vlWN8y8 ZXhAiyMN2LKB/QJuNPp1NROf6QymjHtPGqkdM4UXQJDjGWpmwgx0Wn9SbByEv4P77ovWu42wBXGue WKRQhWZgIoR0r69FWJxpwicLK4XFs91LPK3zdqTrFss5wmxphfnd8sHRBpQnPK5OVyq8Tz5VP3RZ7 X7juTenIq0bvcPB8IpqA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.2 #3 (Red Hat Linux)) id 1iFgTA-0000E7-C0; Wed, 02 Oct 2019 15:23:12 +0000 Received: from mx08-00178001.pphosted.com ([91.207.212.93] helo=mx07-00178001.pphosted.com) by bombadil.infradead.org with esmtps (Exim 4.92.2 #3 (Red Hat Linux)) id 1iFgT7-0000Dl-F7 for linux-arm-kernel@lists.infradead.org; Wed, 02 Oct 2019 15:23:11 +0000 Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx08-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x92F10kl012939; Wed, 2 Oct 2019 17:23:00 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=rh33K3LM0pXmPNo2rwzlOrR6sHjN7N9fVAOOZpl14Dk=; b=Em0ZDgTYONNevVm/0Rox0Fmyi9N+EYdd6ZGbYY/M7ISSwT4mw2sGX6tauYimRyhSxBHP bDYqlqocbMcMqcRRg5fnyo35c9WugHKEOuco9/mlGII7ifFKuMnyBI/BYznxNImzwd05 QV7QXJRu0a7ad/t0ZdJ/m2Svr5p0DKMhcF04PPNm74WA+qmqD6AUoBwrJNncNG3mhdt3 2hixPnfq2MnQqNS5SV53cQuU8jp5vA55hyFUQhQg+TDGiPua+5ULMoFLl9ZOiZSTZYpE aT/JNo8vpSCQnNejkazNwbSTvCEIPefkDkIrqJ70sdod9KhDW9v0zDejOMgjDkOyliXa KA== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx08-00178001.pphosted.com with ESMTP id 2v9vnafq1u-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 02 Oct 2019 17:23:00 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id A59E724; Wed, 2 Oct 2019 15:22:56 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id C5D3F2D377A; Wed, 2 Oct 2019 17:22:55 +0200 (CEST) Received: from SAFEX1HUBCAS22.st.com (10.75.90.92) by SAFEX1HUBCAS21.st.com (10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 2 Oct 2019 17:22:55 +0200 Received: from localhost (10.201.20.122) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 2 Oct 2019 17:22:55 +0200 From: Benjamin Gaignard To: , , , , Subject: [PATCH] dt-bindings: timer: Convert stm32 timer bindings to json-schema Date: Wed, 2 Oct 2019 17:22:53 +0200 Message-ID: <20191002152253.16393-1-benjamin.gaignard@st.com> X-Mailer: git-send-email 2.15.0 MIME-Version: 1.0 X-Originating-IP: [10.201.20.122] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-02_07:2019-10-01,2019-10-02 signatures=0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191002_082309_791695_701B369D X-CRM114-Status: GOOD ( 14.20 ) X-Spam-Score: -0.9 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.9 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low trust [91.207.212.93 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Benjamin Gaignard , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Convert the STM32 timer binding to DT schema format using json-schema Signed-off-by: Benjamin Gaignard --- .../devicetree/bindings/timer/st,stm32-timer.txt | 22 ----------- .../devicetree/bindings/timer/st,stm32-timer.yaml | 46 ++++++++++++++++++++++ 2 files changed, 46 insertions(+), 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/st,stm32-timer.txt create mode 100644 Documentation/devicetree/bindings/timer/st,stm32-timer.yaml diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.txt b/Documentation/devicetree/bindings/timer/st,stm32-timer.txt deleted file mode 100644 index 8ef28e70d6e8..000000000000 --- a/Documentation/devicetree/bindings/timer/st,stm32-timer.txt +++ /dev/null @@ -1,22 +0,0 @@ -. STMicroelectronics STM32 timer - -The STM32 MCUs family has several general-purpose 16 and 32 bits timers. - -Required properties: -- compatible : Should be "st,stm32-timer" -- reg : Address and length of the register set -- clocks : Reference on the timer input clock -- interrupts : Reference to the timer interrupt - -Optional properties: -- resets: Reference to a reset controller asserting the timer - -Example: - -timer5: timer@40000c00 { - compatible = "st,stm32-timer"; - reg = <0x40000c00 0x400>; - interrupts = <50>; - resets = <&rrc 259>; - clocks = <&clk_pmtr1>; -}; diff --git a/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml b/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml new file mode 100644 index 000000000000..e128ac9a5391 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/st,stm32-timer.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/st,stm32-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers bindings + +maintainers: + - Benjamin Gaignard + +properties: + compatible: + const: st,stm32-timer + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Module Clock + + resets: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +examples: + - | + #include + #include + timer: timer@40000c00 { + compatible = "st,stm32-timer"; + reg = <0x40000c00 0x400>; + interrupts = <50>; + clocks = <&clk_pmtr1>; + }; + +...