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[24.155.109.49]) by smtp.googlemail.com with ESMTPSA id a9sm7412463oie.7.2019.10.16.13.07.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Oct 2019 13:07:19 -0700 (PDT) From: Rob Herring To: Andrew Murray , Bjorn Helgaas , Lorenzo Pieralisi Subject: [PATCH v2 16/25] PCI: versatile: Use pci_parse_request_of_pci_ranges() Date: Wed, 16 Oct 2019 15:06:38 -0500 Message-Id: <20191016200647.32050-17-robh@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191016200647.32050-1-robh@kernel.org> References: <20191016200647.32050-1-robh@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191016_130721_649890_772F1874 X-CRM114-Status: GOOD ( 16.09 ) X-Spam-Score: 0.6 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (0.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2) [209.85.167.196 listed in wl.mailspike.net] -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [209.85.167.196 listed in list.dnswl.org] 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (robherring2[at]gmail.com) 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (robherring2[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.2 HEADER_FROM_DIFFERENT_DOMAINS From and EnvelopeFrom 2nd level mail domains are different 0.1 FREEMAIL_FORGED_FROMDOMAIN 2nd level domains in From and EnvelopeFrom freemail headers are different X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Heiko Stuebner , Karthikeyan Mitran , linux-pci@vger.kernel.org, Shawn Lin , Thomas Petazzoni , Toan Le , Will Deacon , Ryder Lee , Michal Simek , linux-rockchip@lists.infradead.org, bcm-kernel-feedback-list@broadcom.com, Linus Walleij , Ray Jui , Hou Zhiqiang , Simon Horman , linux-mediatek@lists.infradead.org, Matthias Brugger , linux-arm-kernel@lists.infradead.org, Scott Branden , Jingoo Han , rfi@lists.rocketboards.org, linux-renesas-soc@vger.kernel.org, Tom Joseph , Srinath Mannam , Gustavo Pimentel , Ley Foon Tan Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Convert ARM Versatile host bridge to use the common pci_parse_request_of_pci_ranges(). There's no need to assign the resources to a temporary list first. Just use bridge->windows directly and remove all the temporary list handling. Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Signed-off-by: Rob Herring Acked-by: Linus Walleij --- v2: - Fix 'mem' initial value to 1 - Remove temporary resource list --- drivers/pci/controller/pci-versatile.c | 64 +++++--------------------- 1 file changed, 11 insertions(+), 53 deletions(-) diff --git a/drivers/pci/controller/pci-versatile.c b/drivers/pci/controller/pci-versatile.c index f59ad2728c0b..18697f2ea345 100644 --- a/drivers/pci/controller/pci-versatile.c +++ b/drivers/pci/controller/pci-versatile.c @@ -62,65 +62,16 @@ static struct pci_ops pci_versatile_ops = { .write = pci_generic_config_write, }; -static int versatile_pci_parse_request_of_pci_ranges(struct device *dev, - struct list_head *res) -{ - int err, mem = 1, res_valid = 0; - resource_size_t iobase; - struct resource_entry *win, *tmp; - - err = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, res, &iobase); - if (err) - return err; - - err = devm_request_pci_bus_resources(dev, res); - if (err) - goto out_release_res; - - resource_list_for_each_entry_safe(win, tmp, res) { - struct resource *res = win->res; - - switch (resource_type(res)) { - case IORESOURCE_IO: - err = devm_pci_remap_iospace(dev, res, iobase); - if (err) { - dev_warn(dev, "error %d: failed to map resource %pR\n", - err, res); - resource_list_destroy_entry(win); - } - break; - case IORESOURCE_MEM: - res_valid |= !(res->flags & IORESOURCE_PREFETCH); - - writel(res->start >> 28, PCI_IMAP(mem)); - writel(PHYS_OFFSET >> 28, PCI_SMAP(mem)); - mem++; - - break; - } - } - - if (res_valid) - return 0; - - dev_err(dev, "non-prefetchable memory resource required\n"); - err = -EINVAL; - -out_release_res: - pci_free_resource_list(res); - return err; -} - static int versatile_pci_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res; - int ret, i, myslot = -1; + struct resource_entry *entry; + int ret, i, myslot = -1, mem = 1; u32 val; void __iomem *local_pci_cfg_base; struct pci_bus *bus, *child; struct pci_host_bridge *bridge; - LIST_HEAD(pci_res); bridge = devm_pci_alloc_host_bridge(dev, 0); if (!bridge) @@ -141,10 +92,18 @@ static int versatile_pci_probe(struct platform_device *pdev) if (IS_ERR(versatile_cfg_base[1])) return PTR_ERR(versatile_cfg_base[1]); - ret = versatile_pci_parse_request_of_pci_ranges(dev, &pci_res); + ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows, NULL); if (ret) return ret; + resource_list_for_each_entry(entry, &bridge->windows) { + if (resource_type(entry->res) == IORESOURCE_MEM) { + writel(entry->res->start >> 28, PCI_IMAP(mem)); + writel(PHYS_OFFSET >> 28, PCI_SMAP(mem)); + mem++; + } + } + /* * We need to discover the PCI core first to configure itself * before the main PCI probing is performed @@ -197,7 +156,6 @@ static int versatile_pci_probe(struct platform_device *pdev) pci_add_flags(PCI_ENABLE_PROC_DOMAINS); pci_add_flags(PCI_REASSIGN_ALL_BUS); - list_splice_init(&pci_res, &bridge->windows); bridge->dev.parent = dev; bridge->sysdata = NULL; bridge->busnr = 0;