| Message ID | 20191121135132.22480-1-broonie@kernel.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | cba779d80a5d4ccb8bdeb799abd02bf7ba9be111 |
| Headers | show |
| Series | arm64: mm: Fix column alignment for UXN in kernel_page_tables | expand |
On Thu, Nov 21, 2019 at 01:51:32PM +0000, Mark Brown wrote: > UXN is the only individual PTE bit other than the PTE_ATTRINDX_MASK ones > which doesn't have both a set and a clear value provided, meaning that the > columns in the table won't all be aligned. The PTE_ATTRINDX_MASK values > are all both mutually exclusive and longer so are listed last to make a > single final column for those values. Ensure everything is aligned by > providing a clear value for UXN. > > Signed-off-by: Mark Brown <broonie@kernel.org> Acked-by: Mark Rutland <mark.rutland@arm.com> Mark. > --- > arch/arm64/mm/dump.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/mm/dump.c b/arch/arm64/mm/dump.c > index 4997ce244172..ef4b3ca1e058 100644 > --- a/arch/arm64/mm/dump.c > +++ b/arch/arm64/mm/dump.c > @@ -144,6 +144,7 @@ static const struct prot_bits pte_bits[] = { > .mask = PTE_UXN, > .val = PTE_UXN, > .set = "UXN", > + .clear = " ", > }, { > .mask = PTE_ATTRINDX_MASK, > .val = PTE_ATTRINDX(MT_DEVICE_nGnRnE), > -- > 2.20.1 >
On Thu, Nov 21, 2019 at 01:51:32PM +0000, Mark Brown wrote: > UXN is the only individual PTE bit other than the PTE_ATTRINDX_MASK ones > which doesn't have both a set and a clear value provided, meaning that the > columns in the table won't all be aligned. The PTE_ATTRINDX_MASK values > are all both mutually exclusive and longer so are listed last to make a > single final column for those values. Ensure everything is aligned by > providing a clear value for UXN. > > Signed-off-by: Mark Brown <broonie@kernel.org> Queued for 5.5-rc1. Thanks.
diff --git a/arch/arm64/mm/dump.c b/arch/arm64/mm/dump.c index 4997ce244172..ef4b3ca1e058 100644 --- a/arch/arm64/mm/dump.c +++ b/arch/arm64/mm/dump.c @@ -144,6 +144,7 @@ static const struct prot_bits pte_bits[] = { .mask = PTE_UXN, .val = PTE_UXN, .set = "UXN", + .clear = " ", }, { .mask = PTE_ATTRINDX_MASK, .val = PTE_ATTRINDX(MT_DEVICE_nGnRnE),
UXN is the only individual PTE bit other than the PTE_ATTRINDX_MASK ones which doesn't have both a set and a clear value provided, meaning that the columns in the table won't all be aligned. The PTE_ATTRINDX_MASK values are all both mutually exclusive and longer so are listed last to make a single final column for those values. Ensure everything is aligned by providing a clear value for UXN. Signed-off-by: Mark Brown <broonie@kernel.org> --- arch/arm64/mm/dump.c | 1 + 1 file changed, 1 insertion(+)