Message ID | 20191128145554.1297-45-linux@rasmusvillemoes.dk (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | QUICC Engine support on ARM, ARM64, PPC64 | expand |
> -----Original Message----- > From: Rasmus Villemoes <linux@rasmusvillemoes.dk> > Sent: Thursday, November 28, 2019 8:56 AM > To: Qiang Zhao <qiang.zhao@nxp.com>; Leo Li <leoyang.li@nxp.com>; > Christophe Leroy <christophe.leroy@c-s.fr> > Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; > linux-kernel@vger.kernel.org; Scott Wood <oss@buserror.net>; Timur Tabi > <timur@kernel.org>; Rasmus Villemoes <linux@rasmusvillemoes.dk>; > netdev@vger.kernel.org > Subject: [PATCH v6 44/49] net/wan/fsl_ucc_hdlc: avoid use of > IS_ERR_VALUE() Hi David, Would you help to review patch 44-47 in the series? If it is fine with you, I can take these 4 patches with the whole series though soc tree to enable the QE drivers on ARM and PPC64 with your ACK. Thanks, Leo > > When building this on a 64-bit platform gcc rightly warns that the error > checking is broken (-ENOMEM stored in an u32 does not compare greater > than (unsigned long)-MAX_ERRNO). Instead, now that > qe_muram_alloc() returns s32, use that type to store the return value and > use standard kernel style "ret < 0". > > Reviewed-by: Timur Tabi <timur@kernel.org> > Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
From: Leo Li <leoyang.li@nxp.com> Date: Mon, 2 Dec 2019 22:51:57 +0000 > > >> -----Original Message----- >> From: Rasmus Villemoes <linux@rasmusvillemoes.dk> >> Sent: Thursday, November 28, 2019 8:56 AM >> To: Qiang Zhao <qiang.zhao@nxp.com>; Leo Li <leoyang.li@nxp.com>; >> Christophe Leroy <christophe.leroy@c-s.fr> >> Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; >> linux-kernel@vger.kernel.org; Scott Wood <oss@buserror.net>; Timur Tabi >> <timur@kernel.org>; Rasmus Villemoes <linux@rasmusvillemoes.dk>; >> netdev@vger.kernel.org >> Subject: [PATCH v6 44/49] net/wan/fsl_ucc_hdlc: avoid use of >> IS_ERR_VALUE() > > Hi David, > > Would you help to review patch 44-47 in the series? If it is fine with you, I can take these 4 patches with the whole series though soc tree to enable the QE drivers on ARM and PPC64 with your ACK. Please take it via your tree, that's fine.
diff --git a/drivers/net/wan/fsl_ucc_hdlc.c b/drivers/net/wan/fsl_ucc_hdlc.c index ce6af7d5380f..405b24a5a60d 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.c +++ b/drivers/net/wan/fsl_ucc_hdlc.c @@ -84,8 +84,8 @@ static int uhdlc_init(struct ucc_hdlc_private *priv) int ret, i; void *bd_buffer; dma_addr_t bd_dma_addr; - u32 riptr; - u32 tiptr; + s32 riptr; + s32 tiptr; u32 gumr; ut_info = priv->ut_info; @@ -195,7 +195,7 @@ static int uhdlc_init(struct ucc_hdlc_private *priv) priv->ucc_pram_offset = qe_muram_alloc(sizeof(struct ucc_hdlc_param), ALIGNMENT_OF_UCC_HDLC_PRAM); - if (IS_ERR_VALUE(priv->ucc_pram_offset)) { + if (priv->ucc_pram_offset < 0) { dev_err(priv->dev, "Can not allocate MURAM for hdlc parameter.\n"); ret = -ENOMEM; goto free_tx_bd; @@ -233,14 +233,14 @@ static int uhdlc_init(struct ucc_hdlc_private *priv) /* Alloc riptr, tiptr */ riptr = qe_muram_alloc(32, 32); - if (IS_ERR_VALUE(riptr)) { + if (riptr < 0) { dev_err(priv->dev, "Cannot allocate MURAM mem for Receive internal temp data pointer\n"); ret = -ENOMEM; goto free_tx_skbuff; } tiptr = qe_muram_alloc(32, 32); - if (IS_ERR_VALUE(tiptr)) { + if (tiptr < 0) { dev_err(priv->dev, "Cannot allocate MURAM mem for Transmit internal temp data pointer\n"); ret = -ENOMEM; goto free_riptr; diff --git a/drivers/net/wan/fsl_ucc_hdlc.h b/drivers/net/wan/fsl_ucc_hdlc.h index 8b3507ae1781..71d5ad0a7b98 100644 --- a/drivers/net/wan/fsl_ucc_hdlc.h +++ b/drivers/net/wan/fsl_ucc_hdlc.h @@ -98,7 +98,7 @@ struct ucc_hdlc_private { unsigned short tx_ring_size; unsigned short rx_ring_size; - u32 ucc_pram_offset; + s32 ucc_pram_offset; unsigned short encoding; unsigned short parity;