@@ -4,6 +4,7 @@
*/
#include <dt-bindings/clock/imx8mm-clock.h>
+#include <dt-bindings/power/imx8m-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -495,6 +496,83 @@
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
};
+
+ gpc: gpc@303a0000 {
+ compatible = "fsl,imx8mm-gpc";
+ reg = <0x303a0000 0x10000>;
+ interrupt-parent = <&gic>;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+
+ pgc {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pgc_mipi: power-domain@0 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_MIPI>;
+ };
+
+ pgc_pcie: power-domain@1 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_PCIE>;
+ };
+
+ pgc_otg1: power-domain@2 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_USB_OTG1>;
+ };
+
+ pgc_otg2: power-domain@3 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_USB_OTG2>;
+ };
+
+ pgc_ddr1: power-domain@4 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_DDR1>;
+ };
+
+ pgc_gpu2d: power-domain@5 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_GPU2D>;
+ };
+
+ pgc_gpu: power-domain@6 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_GPU>;
+ };
+
+ pgc_vpu: power-domain@7 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_VPU>;
+ };
+
+ pgc_gpu3d: power-domain@8 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_GPU3D>;
+ };
+
+ pgc_disp: power-domain@9 {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_DOMAIN_DISP>;
+ };
+
+ pgc_vpu_g1: power-domain@a {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_VPU_G1>;
+ };
+
+ pgc_vpu_g2: power-domain@b {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_VPU_G2>;
+ };
+
+ pgc_vpu_h1: power-domain@c {
+ #power-domain-cells = <0>;
+ reg = <IMX8MM_POWER_VPU_H1>;
+ };
+ };
+ };
};
aips2: bus@30400000 {
There is a power domain controller on the i.XM8M Mini used for handling interrupts and controlling certain peripherals like USB OTG and PCIe, which are currently unavailable. This patch enables support the controller itself to the help facilitate enabling additional peripherals. Signed-off-by: Adam Ford <aford173@gmail.com> --- V2: Removed references making GPC an interrupt controller. arch/arm64/boot/dts/freescale/imx8mm.dtsi | 78 +++++++++++++++++++++++ 1 file changed, 78 insertions(+)