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Mon, 16 Dec 2019 00:59:26 +0800 (CST) From: Chen-Yu Tsai To: Maxime Ripard , Mauro Carvalho Chehab , Sakari Ailus , Rob Herring , Mark Rutland Subject: [PATCH 09/14] ARM: dts: sun8i: r40: Add I2C pinmux options Date: Mon, 16 Dec 2019 00:59:19 +0800 Message-Id: <20191215165924.28314-10-wens@kernel.org> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20191215165924.28314-1-wens@kernel.org> References: <20191215165924.28314-1-wens@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191215_085938_047093_29A96C56 X-CRM114-Status: GOOD ( 10.90 ) X-Spam-Score: -5.2 (-----) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-5.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [198.145.29.99 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chen-Yu Tsai , Chen-Yu Tsai , linux-arm-kernel@lists.infradead.org, linux-media@vger.kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Chen-Yu Tsai The R40 has five I2C controllers. Currently only I2C0 has its pinmux option defined. Add the options for the remaining four, and set them as the default, since each controller has only one possible pinmux configuration. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun8i-r40.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index 421dfbbfd7ee..82ea0b5b0710 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -373,6 +373,26 @@ i2c0_pins: i2c0-pins { function = "i2c0"; }; + i2c1_pins: i2c1-pins { + pins = "PB18", "PB19"; + function = "i2c1"; + }; + + i2c2_pins: i2c2-pins { + pins = "PB20", "PB21"; + function = "i2c2"; + }; + + i2c3_pins: i2c3-pins { + pins = "PI0", "PI1"; + function = "i2c3"; + }; + + i2c4_pins: i2c4-pins { + pins = "PI2", "PI3"; + function = "i2c4"; + }; + mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; @@ -528,6 +548,8 @@ i2c1: i2c@1c2b000 { interrupts = ; clocks = <&ccu CLK_BUS_I2C1>; resets = <&ccu RST_BUS_I2C1>; + pinctrl-0 = <&i2c1_pins>; + pinctrl-names = "default"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -539,6 +561,8 @@ i2c2: i2c@1c2b400 { interrupts = ; clocks = <&ccu CLK_BUS_I2C2>; resets = <&ccu RST_BUS_I2C2>; + pinctrl-0 = <&i2c2_pins>; + pinctrl-names = "default"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -550,6 +574,8 @@ i2c3: i2c@1c2b800 { interrupts = ; clocks = <&ccu CLK_BUS_I2C3>; resets = <&ccu RST_BUS_I2C3>; + pinctrl-0 = <&i2c3_pins>; + pinctrl-names = "default"; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -561,6 +587,8 @@ i2c4: i2c@1c2c000 { interrupts = ; clocks = <&ccu CLK_BUS_I2C4>; resets = <&ccu RST_BUS_I2C4>; + pinctrl-0 = <&i2c4_pins>; + pinctrl-names = "default"; status = "disabled"; #address-cells = <1>; #size-cells = <0>;