Message ID | 20191216111530.29558-1-aford173@gmail.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 24a572bf67994223e722cadfe663e15ba221882a |
Headers | show |
Series | arm64: dts: imx8mm: Change SDMA1 ahb clock for imx8mm | expand |
On Mon, Dec 16, 2019 at 05:15:30AM -0600, Adam Ford wrote: > Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error. > This patch changes to ahb clock from SDMA1_ROOT to AHB which > fixes the timeout error. > > Fixes: a05ea40eb384 ("arm64: dts: imx: Add i.mx8mm dtsi support") > > Signed-off-by: Adam Ford <aford173@gmail.com> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 6edbdfe2d0d7..3d95b66a2d71 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -740,7 +740,7 @@ reg = <0x30bd0000 0x10000>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MM_CLK_SDMA1_ROOT>, - <&clk IMX8MM_CLK_SDMA1_ROOT>; + <&clk IMX8MM_CLK_AHB>; clock-names = "ipg", "ahb"; #dma-cells = <3>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error. This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the timeout error. Fixes: a05ea40eb384 ("arm64: dts: imx: Add i.mx8mm dtsi support") Signed-off-by: Adam Ford <aford173@gmail.com> --- A similar fix was made to the i.MX8MQ for the same reason