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[81.140.166.164]) by smtp.gmail.com with ESMTPSA id q3sm9123252wrn.33.2020.01.09.08.06.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jan 2020 08:06:59 -0800 (PST) From: Julien Thierry To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [RFC v5 31/57] objtool: arm64: Decode load/store with register offset Date: Thu, 9 Jan 2020 16:02:34 +0000 Message-Id: <20200109160300.26150-32-jthierry@redhat.com> X-Mailer: git-send-email 2.21.1 In-Reply-To: <20200109160300.26150-1-jthierry@redhat.com> References: <20200109160300.26150-1-jthierry@redhat.com> MIME-Version: 1.0 X-MC-Unique: O3H-sbF5MyGkaWslaHvolA-1 X-Mimecast-Spam-Score: 0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200109_080706_280434_E230C457 X-CRM114-Status: GOOD ( 11.72 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [205.139.110.120 listed in list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Julien Thierry , peterz@infradead.org, catalin.marinas@arm.com, raphael.gault@arm.com, jpoimboe@redhat.com, will@kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Decode load/store instruction using the value of a register as offset for the target address. Since objtool can't keep track of the possible values of this offset, it is not possible to take this instructions into account for stack frame validation. Luckily, the compiler does not tend to generate these instructions for stack/frame pointer manipulation. Suggested-by: Raphael Gault Signed-off-by: Julien Thierry --- tools/objtool/arch/arm64/decode.c | 34 +++++++++++++++++++ .../objtool/arch/arm64/include/insn_decode.h | 3 ++ 2 files changed, 37 insertions(+) diff --git a/tools/objtool/arch/arm64/decode.c b/tools/objtool/arch/arm64/decode.c index 7064302416f4..00d5d627af08 100644 --- a/tools/objtool/arch/arm64/decode.c +++ b/tools/objtool/arch/arm64/decode.c @@ -830,6 +830,11 @@ static struct aarch64_insn_decoder ld_st_decoder[] = { .value = 0b001100000000011, .decode_func = arm_decode_ld_st_imm_pre, }, + { + .mask = 0b001101010000011, + .value = 0b001100010000010, + .decode_func = arm_decode_ld_st_regs_off, + }, { .mask = 0b001101000000000, .value = 0b001101000000000, @@ -1200,3 +1205,32 @@ int arm_decode_ld_st_imm_unpriv(u32 instr, enum insn_type *type, } return 0; } + +int arm_decode_ld_st_regs_off(u32 instr, enum insn_type *type, + unsigned long *immediate, + struct list_head *ops_list) +{ + unsigned char size = 0, V = 0, opc = 0, option = 0; + unsigned char decode_field = 0; + + size = (instr >> 30) & ONES(2); + V = EXTRACT_BIT(instr, 26); + opc = (instr >> 22) & ONES(2); + option = (instr >> 13) & ONES(3); + +#define LD_ROFF_UNALLOC_1 0b01110 +#define LD_ROFF_UNALLOC_2 0b10110 +#define LD_ROFF_UNALLOC_3 0b10011 + decode_field = (size << 3) | (V << 2) | opc; + if (!EXTRACT_BIT(option, 1) || + (decode_field & LD_ROFF_UNALLOC_1) == LD_ROFF_UNALLOC_1 || + (decode_field & LD_ROFF_UNALLOC_2) == LD_ROFF_UNALLOC_2 || + (decode_field & 0b10111) == LD_ROFF_UNALLOC_3) { + return arm_decode_unknown(instr, type, immediate, ops_list); + } +#undef LD_ROFF_UNALLOC_1 +#undef LD_ROFF_UNALLOC_2 +#undef LD_ROFF_UNALLOC_3 + + return 0; +} diff --git a/tools/objtool/arch/arm64/include/insn_decode.h b/tools/objtool/arch/arm64/include/insn_decode.h index 1e031b12cf69..9043ca6f6708 100644 --- a/tools/objtool/arch/arm64/include/insn_decode.h +++ b/tools/objtool/arch/arm64/include/insn_decode.h @@ -106,6 +106,9 @@ int arm_decode_ld_st_imm_unpriv(u32 instr, enum insn_type *type, int arm_decode_ld_st_imm_pre(u32 instr, enum insn_type *type, unsigned long *immediate, struct list_head *ops_list); +int arm_decode_ld_st_regs_off(u32 instr, enum insn_type *type, + unsigned long *immediate, + struct list_head *ops_list); int arm_decode_ld_st_regs_unsigned(u32 instr, enum insn_type *type, unsigned long *immediate, struct list_head *ops_list);