Message ID | 20200112151014.2593-1-parkch98@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: add Cortex-A76 to spectre v2 safe-list | expand |
On 2020-01-12 15:10, Chanho Park wrote: > Cortex A76(Enyo) core can be added in spectre v2(CVE-2017-5715 > (Spectre, > Variant 2, Branch Target Injection) safe list. > > Signed-off-by: Chanho Park <parkch98@gmail.com> > --- > arch/arm64/kernel/cpu_errata.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/arch/arm64/kernel/cpu_errata.c > b/arch/arm64/kernel/cpu_errata.c > index 85f4bec22f6d..9895d56bf5ac 100644 > --- a/arch/arm64/kernel/cpu_errata.c > +++ b/arch/arm64/kernel/cpu_errata.c > @@ -546,6 +546,7 @@ static const struct midr_range > spectre_v2_safe_list[] = { > MIDR_ALL_VERSIONS(MIDR_CORTEX_A35), > MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), > MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), > + MIDR_ALL_VERSIONS(MIDR_CORTEX_A76), > MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), > MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), > { /* sentinel */ } Why? Doesn't Cortex-A76 already advertize ID_AA64PFR0_EL1.CSV2? M.
diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 85f4bec22f6d..9895d56bf5ac 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -546,6 +546,7 @@ static const struct midr_range spectre_v2_safe_list[] = { MIDR_ALL_VERSIONS(MIDR_CORTEX_A35), MIDR_ALL_VERSIONS(MIDR_CORTEX_A53), MIDR_ALL_VERSIONS(MIDR_CORTEX_A55), + MIDR_ALL_VERSIONS(MIDR_CORTEX_A76), MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53), MIDR_ALL_VERSIONS(MIDR_HISI_TSV110), { /* sentinel */ }
Cortex A76(Enyo) core can be added in spectre v2(CVE-2017-5715 (Spectre, Variant 2, Branch Target Injection) safe list. Signed-off-by: Chanho Park <parkch98@gmail.com> --- arch/arm64/kernel/cpu_errata.c | 1 + 1 file changed, 1 insertion(+)