From patchwork Fri Jan 17 22:48:33 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 11339951 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C16EB92A for ; Fri, 17 Jan 2020 22:51:53 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9F6B621D56 for ; Fri, 17 Jan 2020 22:51:53 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="p53Vw/fU"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="mrCFH1Gw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9F6B621D56 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References: In-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=44WU9fQBlBecPUujVJNcILyH6id5JREaeZkd202CwJw=; b=p53Vw/fU5F12tavtO4Jw78BYQt FPqRQnYA3k8w/q0Q1pYxEDFQ64loLs6VZaPVeMyGHtNPxFLIEpk3g5V1L1jqmfnGufsAUV6q67B1l Y07j+5u1Eg9ks5eEIO72glmLalc2++0tP0mLqZHs3YalviZ3R2yqxq25giOjvHd8PWNrzO4QBYJyg 1RsUBvC6abwDDxrEZi6gd3M5z+A9RkHlzN5JsXtR1dxg0490kPzp2eWvLS1d2sCsFi5dK2iVz6utF BUBVRnS1LV1FRsOk3SZBsWNYFCd0tKxaD0Kle4QCLiMXMbY1gvIHjVQsOk6Is13JvSIHXuWBI7BSA LIdsXDzQ==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1isaSw-0007vO-6Y; Fri, 17 Jan 2020 22:51:46 +0000 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1isaSr-0007p4-5G for linux-arm-kernel@lists.infradead.org; Fri, 17 Jan 2020 22:51:42 +0000 Received: by mail-wm1-x343.google.com with SMTP id m24so8902583wmc.3 for ; Fri, 17 Jan 2020 14:51:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=a2nRYyxjPyQF3IQbPCKoaUguo6CO4aiwXRtlS8UQpy4=; b=mrCFH1GwjEvP5rc4v6hfkWt1VfevjpOfR8mWd7KchYIl22HwQ1k5jnY973BNjzhZa/ quqliCkrWY2K7omPvj0n0iomDfOi4N3Uhdn0cGmGqyUeieTfmmXhs5PpOufb9tQDcqp7 gxbRyGLGA4E+XxDhB6wwZBSI9E1c6gopwT5B9zOZxWWfR6L4j4B2fCdKgocUB1cSiuKT 0TqwLD0aT9GJxcKhh2P/PZdN54PZ/QNETl2ElMPzy+2uL8dOnxeQMsxm7UOeDq6XrWN7 KhGAdw+of0JMHR0qWJMcjKO8G7O1v9dzAs5bVBvo4cOtAshz7nRnK83G7bwcvJ6N25kM T0yw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=a2nRYyxjPyQF3IQbPCKoaUguo6CO4aiwXRtlS8UQpy4=; b=GuX3CkSdOciREZOFFDfA9UiUWdou4mf1i1Z867Up0j3BaFoHHTFje9BIiX54tu/01I 9QWkeD3iaAJak2VthsUT77bAhw9zGNUwz++1NGUJy+VaROAkRpLUYwqXhtdZTT2tUS8T jtWkONX8Q3U1r9Tm3hclp7+iKGH/7jDYq2eAaOOGR1YQpgsBwuZaIS7J2NiTJeAHVH2L vJE1gmicqx8oeel9SP1vm+R2+8iX2PhgyJsFYIofgIMobqWw4XJA5KEfktjZEmBxf8Ds YRQbGR4yyquwT+IrI5AYnwr2zNvwY3IpOQV0Lpsus0uRxcaDKnk4NWc+CXoYay3j8y25 DxBg== X-Gm-Message-State: APjAAAViAKdQQBzqWPPu0XZ2nGgu27PBbHBZaXQAbf098FeB8pBNizI0 fEcUh75SEv0UzUo9Un6HQqY6sZEn X-Google-Smtp-Source: APXvYqzk6ElFxJJj9rYsDdIiJandeO9CA/171N8ngvBFdCN+IeYqvKr6jMTgzHZBja9vKBJOsMFBUg== X-Received: by 2002:a1c:3c89:: with SMTP id j131mr6975350wma.34.1579301499190; Fri, 17 Jan 2020 14:51:39 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id l3sm32829387wrt.29.2020.01.17.14.51.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 17 Jan 2020 14:51:38 -0800 (PST) From: Florian Fainelli To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v7 1/7] ARM: Moved CP15 definitions from kvm_hyp.h to cp15.h Date: Fri, 17 Jan 2020 14:48:33 -0800 Message-Id: <20200117224839.23531-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200117224839.23531-1-f.fainelli@gmail.com> References: <20200117224839.23531-1-f.fainelli@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200117_145141_220576_61664496 X-CRM114-Status: UNSURE ( 9.91 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:343 listed in] [list.dnswl.org] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (f.fainelli[at]gmail.com) 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, alexandre.belloni@bootlin.com, mhocko@suse.com, julien.thierry@arm.com, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, dhowells@redhat.com, yamada.masahiro@socionext.com, ryabinin.a.a@gmail.com, glider@google.com, kvmarm@lists.cs.columbia.edu, Florian Fainelli , corbet@lwn.net, liuwenliang@huawei.com, daniel.lezcano@linaro.org, linux@armlinux.org.uk, kasan-dev@googlegroups.com, bcm-kernel-feedback-list@broadcom.com, geert@linux-m68k.org, drjones@redhat.com, vladimir.murzin@arm.com, keescook@chromium.org, arnd@arndb.de, marc.zyngier@arm.com, andre.przywara@arm.com, philip@cog.systems, jinb.park7@gmail.com, tglx@linutronix.de, dvyukov@google.com, nico@fluxnic.net, gregkh@linuxfoundation.org, ard.biesheuvel@linaro.org, linux-doc@vger.kernel.org, christoffer.dall@arm.com, rob@landley.net, pombredanne@nexb.com, akpm@linux-foundation.org, thgarnie@google.com, kirill.shutemov@linux.intel.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org We are going to add specific accessor functions for TTBR which are 32-bit/64-bit appropriate, move all CP15 register definitions into cp15.h where they belong. Suggested-by: Linus Walleij Tested-by: Linus Walleij Signed-off-by: Florian Fainelli --- arch/arm/include/asm/cp15.h | 57 ++++++++++++++++++++++++++++++++++ arch/arm/include/asm/kvm_hyp.h | 54 -------------------------------- 2 files changed, 57 insertions(+), 54 deletions(-) diff --git a/arch/arm/include/asm/cp15.h b/arch/arm/include/asm/cp15.h index d2453e2d3f1f..89b6663f2863 100644 --- a/arch/arm/include/asm/cp15.h +++ b/arch/arm/include/asm/cp15.h @@ -70,6 +70,63 @@ #define CNTVCT __ACCESS_CP15_64(1, c14) +#define TTBR0_32 __ACCESS_CP15(c2, 0, c0, 0) +#define TTBR1_32 __ACCESS_CP15(c2, 0, c0, 1) +#define PAR_32 __ACCESS_CP15(c7, 0, c4, 0) +#define TTBR0_64 __ACCESS_CP15_64(0, c2) +#define TTBR1_64 __ACCESS_CP15_64(1, c2) +#define PAR_64 __ACCESS_CP15_64(0, c7) +#define VTTBR __ACCESS_CP15_64(6, c2) +#define CNTP_CVAL __ACCESS_CP15_64(2, c14) +#define CNTV_CVAL __ACCESS_CP15_64(3, c14) +#define CNTVOFF __ACCESS_CP15_64(4, c14) + +#define MIDR __ACCESS_CP15(c0, 0, c0, 0) +#define CSSELR __ACCESS_CP15(c0, 2, c0, 0) +#define VPIDR __ACCESS_CP15(c0, 4, c0, 0) +#define VMPIDR __ACCESS_CP15(c0, 4, c0, 5) +#define SCTLR __ACCESS_CP15(c1, 0, c0, 0) +#define CPACR __ACCESS_CP15(c1, 0, c0, 2) +#define HCR __ACCESS_CP15(c1, 4, c1, 0) +#define HDCR __ACCESS_CP15(c1, 4, c1, 1) +#define HCPTR __ACCESS_CP15(c1, 4, c1, 2) +#define HSTR __ACCESS_CP15(c1, 4, c1, 3) +#define TTBCR __ACCESS_CP15(c2, 0, c0, 2) +#define HTCR __ACCESS_CP15(c2, 4, c0, 2) +#define VTCR __ACCESS_CP15(c2, 4, c1, 2) +#define DACR __ACCESS_CP15(c3, 0, c0, 0) +#define DFSR __ACCESS_CP15(c5, 0, c0, 0) +#define IFSR __ACCESS_CP15(c5, 0, c0, 1) +#define ADFSR __ACCESS_CP15(c5, 0, c1, 0) +#define AIFSR __ACCESS_CP15(c5, 0, c1, 1) +#define HSR __ACCESS_CP15(c5, 4, c2, 0) +#define DFAR __ACCESS_CP15(c6, 0, c0, 0) +#define IFAR __ACCESS_CP15(c6, 0, c0, 2) +#define HDFAR __ACCESS_CP15(c6, 4, c0, 0) +#define HIFAR __ACCESS_CP15(c6, 4, c0, 2) +#define HPFAR __ACCESS_CP15(c6, 4, c0, 4) +#define ICIALLUIS __ACCESS_CP15(c7, 0, c1, 0) +#define BPIALLIS __ACCESS_CP15(c7, 0, c1, 6) +#define ICIMVAU __ACCESS_CP15(c7, 0, c5, 1) +#define ATS1CPR __ACCESS_CP15(c7, 0, c8, 0) +#define TLBIALLIS __ACCESS_CP15(c8, 0, c3, 0) +#define TLBIALL __ACCESS_CP15(c8, 0, c7, 0) +#define TLBIALLNSNHIS __ACCESS_CP15(c8, 4, c3, 4) +#define PRRR __ACCESS_CP15(c10, 0, c2, 0) +#define NMRR __ACCESS_CP15(c10, 0, c2, 1) +#define AMAIR0 __ACCESS_CP15(c10, 0, c3, 0) +#define AMAIR1 __ACCESS_CP15(c10, 0, c3, 1) +#define VBAR __ACCESS_CP15(c12, 0, c0, 0) +#define CID __ACCESS_CP15(c13, 0, c0, 1) +#define TID_URW __ACCESS_CP15(c13, 0, c0, 2) +#define TID_URO __ACCESS_CP15(c13, 0, c0, 3) +#define TID_PRIV __ACCESS_CP15(c13, 0, c0, 4) +#define HTPIDR __ACCESS_CP15(c13, 4, c0, 2) +#define CNTKCTL __ACCESS_CP15(c14, 0, c1, 0) +#define CNTP_CTL __ACCESS_CP15(c14, 0, c2, 1) +#define CNTV_CTL __ACCESS_CP15(c14, 0, c3, 1) +#define CNTHCTL __ACCESS_CP15(c14, 4, c1, 0) + extern unsigned long cr_alignment; /* defined in entry-armv.S */ static inline unsigned long get_cr(void) diff --git a/arch/arm/include/asm/kvm_hyp.h b/arch/arm/include/asm/kvm_hyp.h index 40e9034db601..f6635bd63ff0 100644 --- a/arch/arm/include/asm/kvm_hyp.h +++ b/arch/arm/include/asm/kvm_hyp.h @@ -25,60 +25,6 @@ __val; \ }) -#define TTBR0 __ACCESS_CP15_64(0, c2) -#define TTBR1 __ACCESS_CP15_64(1, c2) -#define VTTBR __ACCESS_CP15_64(6, c2) -#define PAR __ACCESS_CP15_64(0, c7) -#define CNTP_CVAL __ACCESS_CP15_64(2, c14) -#define CNTV_CVAL __ACCESS_CP15_64(3, c14) -#define CNTVOFF __ACCESS_CP15_64(4, c14) - -#define MIDR __ACCESS_CP15(c0, 0, c0, 0) -#define CSSELR __ACCESS_CP15(c0, 2, c0, 0) -#define VPIDR __ACCESS_CP15(c0, 4, c0, 0) -#define VMPIDR __ACCESS_CP15(c0, 4, c0, 5) -#define SCTLR __ACCESS_CP15(c1, 0, c0, 0) -#define CPACR __ACCESS_CP15(c1, 0, c0, 2) -#define HCR __ACCESS_CP15(c1, 4, c1, 0) -#define HDCR __ACCESS_CP15(c1, 4, c1, 1) -#define HCPTR __ACCESS_CP15(c1, 4, c1, 2) -#define HSTR __ACCESS_CP15(c1, 4, c1, 3) -#define TTBCR __ACCESS_CP15(c2, 0, c0, 2) -#define HTCR __ACCESS_CP15(c2, 4, c0, 2) -#define VTCR __ACCESS_CP15(c2, 4, c1, 2) -#define DACR __ACCESS_CP15(c3, 0, c0, 0) -#define DFSR __ACCESS_CP15(c5, 0, c0, 0) -#define IFSR __ACCESS_CP15(c5, 0, c0, 1) -#define ADFSR __ACCESS_CP15(c5, 0, c1, 0) -#define AIFSR __ACCESS_CP15(c5, 0, c1, 1) -#define HSR __ACCESS_CP15(c5, 4, c2, 0) -#define DFAR __ACCESS_CP15(c6, 0, c0, 0) -#define IFAR __ACCESS_CP15(c6, 0, c0, 2) -#define HDFAR __ACCESS_CP15(c6, 4, c0, 0) -#define HIFAR __ACCESS_CP15(c6, 4, c0, 2) -#define HPFAR __ACCESS_CP15(c6, 4, c0, 4) -#define ICIALLUIS __ACCESS_CP15(c7, 0, c1, 0) -#define BPIALLIS __ACCESS_CP15(c7, 0, c1, 6) -#define ICIMVAU __ACCESS_CP15(c7, 0, c5, 1) -#define ATS1CPR __ACCESS_CP15(c7, 0, c8, 0) -#define TLBIALLIS __ACCESS_CP15(c8, 0, c3, 0) -#define TLBIALL __ACCESS_CP15(c8, 0, c7, 0) -#define TLBIALLNSNHIS __ACCESS_CP15(c8, 4, c3, 4) -#define PRRR __ACCESS_CP15(c10, 0, c2, 0) -#define NMRR __ACCESS_CP15(c10, 0, c2, 1) -#define AMAIR0 __ACCESS_CP15(c10, 0, c3, 0) -#define AMAIR1 __ACCESS_CP15(c10, 0, c3, 1) -#define VBAR __ACCESS_CP15(c12, 0, c0, 0) -#define CID __ACCESS_CP15(c13, 0, c0, 1) -#define TID_URW __ACCESS_CP15(c13, 0, c0, 2) -#define TID_URO __ACCESS_CP15(c13, 0, c0, 3) -#define TID_PRIV __ACCESS_CP15(c13, 0, c0, 4) -#define HTPIDR __ACCESS_CP15(c13, 4, c0, 2) -#define CNTKCTL __ACCESS_CP15(c14, 0, c1, 0) -#define CNTP_CTL __ACCESS_CP15(c14, 0, c2, 1) -#define CNTV_CTL __ACCESS_CP15(c14, 0, c3, 1) -#define CNTHCTL __ACCESS_CP15(c14, 4, c1, 0) - #define VFP_FPEXC __ACCESS_VFP(FPEXC) /* AArch64 compatibility macros, only for the timer so far */