| Message ID | 20200123145112.22170-1-maz@kernel.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 3543d7ddd55fe12c37e8a9db846216c51846015b |
| Headers | show |
| Series | arm64: dts: fast models: Fix FVP PCI interrupt-map property | expand |
On Thu, Jan 23, 2020 at 02:51:12PM +0000, Marc Zyngier wrote: > The interrupt map for the FVP's PCI node is missing the > parent-unit-address cells for each of the INTx entries, leading to the > kernel code failing to parse the entries correctly. > > Add the missing zero cells, which are pretty useless as far as the GIC > is concerned, but that the spec requires. This allows INTx to be usable > on the model, and VFIO to work correctly. > I assume we need, Fixes: fa083b99eb28 ("arm64: dts: fast models: Add DTS fo Base RevC FVP") Please shout if that's not necessary. -- Regards, Sudeep
On 2020-01-23 15:01, Sudeep Holla wrote: > On Thu, Jan 23, 2020 at 02:51:12PM +0000, Marc Zyngier wrote: >> The interrupt map for the FVP's PCI node is missing the >> parent-unit-address cells for each of the INTx entries, leading to the >> kernel code failing to parse the entries correctly. >> >> Add the missing zero cells, which are pretty useless as far as the GIC >> is concerned, but that the spec requires. This allows INTx to be >> usable >> on the model, and VFIO to work correctly. >> > > I assume we need, > > Fixes: fa083b99eb28 ("arm64: dts: fast models: Add DTS fo Base RevC > FVP") > > Please shout if that's not necessary. Yes, you're absolutely right (I'm not shouting! ;-). M.
On Thu, Jan 23, 2020 at 03:04:55PM +0000, Marc Zyngier wrote: > On 2020-01-23 15:01, Sudeep Holla wrote: > > On Thu, Jan 23, 2020 at 02:51:12PM +0000, Marc Zyngier wrote: > > > The interrupt map for the FVP's PCI node is missing the > > > parent-unit-address cells for each of the INTx entries, leading to the > > > kernel code failing to parse the entries correctly. > > > > > > Add the missing zero cells, which are pretty useless as far as the GIC > > > is concerned, but that the spec requires. This allows INTx to be > > > usable > > > on the model, and VFIO to work correctly. > > > > > > > I assume we need, > > > > Fixes: fa083b99eb28 ("arm64: dts: fast models: Add DTS fo Base RevC > > FVP") > > > > Please shout if that's not necessary. > > Yes, you're absolutely right (I'm not shouting! ;-). > Thanks for the patch and not shouting :), I will send it for v5.6, it will get backported anyways with fixes tag. -- Regards, Sudeep
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts index 62ab0d54ff71..335fff762451 100644 --- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts +++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts @@ -161,10 +161,10 @@ bus-range = <0x0 0x1>; reg = <0x0 0x40000000 0x0 0x10000000>; ranges = <0x2000000 0x0 0x50000000 0x0 0x50000000 0x0 0x10000000>; - interrupt-map = <0 0 0 1 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 2 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 3 &gic GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, - <0 0 0 4 &gic GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &gic 0 0 GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &gic 0 0 GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; interrupt-map-mask = <0x0 0x0 0x0 0x7>; msi-map = <0x0 &its 0x0 0x10000>; iommu-map = <0x0 &smmu 0x0 0x10000>;
The interrupt map for the FVP's PCI node is missing the parent-unit-address cells for each of the INTx entries, leading to the kernel code failing to parse the entries correctly. Add the missing zero cells, which are pretty useless as far as the GIC is concerned, but that the spec requires. This allows INTx to be usable on the model, and VFIO to work correctly. Signed-off-by: Marc Zyngier <maz@kernel.org> --- Resending this, as I seem to have used the wrong SMTP server... arch/arm64/boot/dts/arm/fvp-base-revc.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)