Message ID | 20200204235552.7466-12-f.fainelli@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | dt-bindings: arm: bcm: Convert boards to YAML | expand |
On Tue, Feb 04, 2020 at 03:55:51PM -0800, Florian Fainelli wrote: > diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml > index c23c24ff7575..d7b181a44789 100644 > --- a/Documentation/devicetree/bindings/arm/cpus.yaml > +++ b/Documentation/devicetree/bindings/arm/cpus.yaml > @@ -272,6 +272,39 @@ properties: > While optional, it is the preferred way to get access to > the cpu-core power-domains. > > + secondary-boot-reg: > + $ref: '/schemas/types.yaml#/definitions/uint32' > + description: | > + Required for systems that have an "enable-method" property value of > + "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp". > + > + This includes the following SoCs: | > + BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550 > + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 > + > + The secondary-boot-reg property is a u32 value that specifies the > + physical address of the register used to request the ROM holding pen > + code release a secondary CPU. The value written to the register is > + formed by encoding the target CPU id into the low bits of the > + physical start address it should jump to. > + > +if: > + # If the enable-method property contains one of those values > + properties: > + enable-method: > + contains: > + enum: > + - brcm,bcm11351-cpu-method > + - brcm,bcm23550 > + - brcm,bcm-nsp-smp > + # and if enable-method is present Those comments were purely for the explanation, but you can keep them I guess :) Regardless on whether or not you keep them, for the whole series Acked-by: Maxime Ripard <mripard@kernel.org> Maxime
On 2/4/20 11:49 PM, Maxime Ripard wrote: > On Tue, Feb 04, 2020 at 03:55:51PM -0800, Florian Fainelli wrote: >> diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml >> index c23c24ff7575..d7b181a44789 100644 >> --- a/Documentation/devicetree/bindings/arm/cpus.yaml >> +++ b/Documentation/devicetree/bindings/arm/cpus.yaml >> @@ -272,6 +272,39 @@ properties: >> While optional, it is the preferred way to get access to >> the cpu-core power-domains. >> >> + secondary-boot-reg: >> + $ref: '/schemas/types.yaml#/definitions/uint32' >> + description: | >> + Required for systems that have an "enable-method" property value of >> + "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp". >> + >> + This includes the following SoCs: | >> + BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550 >> + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 >> + >> + The secondary-boot-reg property is a u32 value that specifies the >> + physical address of the register used to request the ROM holding pen >> + code release a secondary CPU. The value written to the register is >> + formed by encoding the target CPU id into the low bits of the >> + physical start address it should jump to. >> + >> +if: >> + # If the enable-method property contains one of those values >> + properties: >> + enable-method: >> + contains: >> + enum: >> + - brcm,bcm11351-cpu-method >> + - brcm,bcm23550 >> + - brcm,bcm-nsp-smp >> + # and if enable-method is present > > Those comments were purely for the explanation, but you can keep them > I guess :) > > Regardless on whether or not you keep them, for the whole series > Acked-by: Maxime Ripard <mripard@kernel.org> You could almost have Signed-off-by on this one, thanks a lot for walking me through examples.
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt deleted file mode 100644 index e3f996920403..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt +++ /dev/null @@ -1,36 +0,0 @@ -Broadcom Kona Family CPU Enable Method --------------------------------------- -This binding defines the enable method used for starting secondary -CPUs in the following Broadcom SoCs: - BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664 - -The enable method is specified by defining the following required -properties in the "cpu" device tree node: - - enable-method = "brcm,bcm11351-cpu-method"; - - secondary-boot-reg = <...>; - -The secondary-boot-reg property is a u32 value that specifies the -physical address of the register used to request the ROM holding pen -code release a secondary CPU. The value written to the register is -formed by encoding the target CPU id into the low bits of the -physical start address it should jump to. - -Example: - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - enable-method = "brcm,bcm11351-cpu-method"; - secondary-boot-reg = <0x3500417c>; - }; - }; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt deleted file mode 100644 index a3af54c0e404..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt +++ /dev/null @@ -1,36 +0,0 @@ -Broadcom Kona Family CPU Enable Method --------------------------------------- -This binding defines the enable method used for starting secondary -CPUs in the following Broadcom SoCs: - BCM23550 - -The enable method is specified by defining the following required -properties in the "cpu" device tree node: - - enable-method = "brcm,bcm23550"; - - secondary-boot-reg = <...>; - -The secondary-boot-reg property is a u32 value that specifies the -physical address of the register used to request the ROM holding pen -code release a secondary CPU. The value written to the register is -formed by encoding the target CPU id into the low bits of the -physical start address it should jump to. - -Example: - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <0>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - reg = <1>; - enable-method = "brcm,bcm23550"; - secondary-boot-reg = <0x3500417c>; - }; - }; diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt b/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt deleted file mode 100644 index 677ef9d9f445..000000000000 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt +++ /dev/null @@ -1,39 +0,0 @@ -Broadcom Northstar Plus SoC CPU Enable Method ---------------------------------------------- -This binding defines the enable method used for starting secondary -CPU in the following Broadcom SoCs: - BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 - -The enable method is specified by defining the following required -properties in the corresponding secondary "cpu" device tree node: - - enable-method = "brcm,bcm-nsp-smp"; - - secondary-boot-reg = <...>; - -The secondary-boot-reg property is a u32 value that specifies the -physical address of the register which should hold the common -entry point for a secondary CPU. This entry is cpu node specific -and should be added per cpu. E.g., in case of NSP (BCM58625) which -is a dual core CPU SoC, this entry should be added to cpu1 node. - - -Example: - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@0 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - reg = <0>; - }; - - cpu1: cpu@1 { - device_type = "cpu"; - compatible = "arm,cortex-a9"; - next-level-cache = <&L2>; - enable-method = "brcm,bcm-nsp-smp"; - secondary-boot-reg = <0xffff042c>; - reg = <1>; - }; - }; diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index c23c24ff7575..d7b181a44789 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -272,6 +272,39 @@ properties: While optional, it is the preferred way to get access to the cpu-core power-domains. + secondary-boot-reg: + $ref: '/schemas/types.yaml#/definitions/uint32' + description: | + Required for systems that have an "enable-method" property value of + "brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp". + + This includes the following SoCs: | + BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550 + BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312 + + The secondary-boot-reg property is a u32 value that specifies the + physical address of the register used to request the ROM holding pen + code release a secondary CPU. The value written to the register is + formed by encoding the target CPU id into the low bits of the + physical start address it should jump to. + +if: + # If the enable-method property contains one of those values + properties: + enable-method: + contains: + enum: + - brcm,bcm11351-cpu-method + - brcm,bcm23550 + - brcm,bcm-nsp-smp + # and if enable-method is present + required: + - enable-method + +then: + required: + - secondary-boot-reg + required: - device_type - reg
Consolidate and move the 'secondary-boot-reg' property from the 3 existing binding documents into the main cpus.yaml documentation, also make sure that the property is enforced when relevant. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> --- .../arm/bcm/brcm,bcm11351-cpu-method.txt | 36 ----------------- .../arm/bcm/brcm,bcm23550-cpu-method.txt | 36 ----------------- .../bindings/arm/bcm/brcm,nsp-cpu-method.txt | 39 ------------------- .../devicetree/bindings/arm/cpus.yaml | 33 ++++++++++++++++ 4 files changed, 33 insertions(+), 111 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm11351-cpu-method.txt delete mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,bcm23550-cpu-method.txt delete mode 100644 Documentation/devicetree/bindings/arm/bcm/brcm,nsp-cpu-method.txt