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Tue, 11 Feb 2020 19:44:15 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 3FEBE107ACCA; Wed, 12 Feb 2020 00:44:14 +0000 (UTC) Received: from localhost.localdomain.com (vpn2-54-85.bne.redhat.com [10.64.54.85]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8B0FA5D9E2; Wed, 12 Feb 2020 00:44:11 +0000 (UTC) From: Gavin Shan To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 4/5] arm64: Remove CPU operations dereferencing array Date: Wed, 12 Feb 2020 11:43:50 +1100 Message-Id: <20200212004351.66576-5-gshan@redhat.com> In-Reply-To: <20200212004351.66576-1-gshan@redhat.com> References: <20200212004351.66576-1-gshan@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-MC-Unique: VjwPVUpHP5mfyhGG08MoZQ-1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200211_164419_067764_15FA01EF X-CRM114-Status: GOOD ( 12.66 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [207.211.31.81 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, lorenzo.pieralisi@arm.com, will@kernel.org, catalin.marinas@arm.com, sudeep.holla@arm.com, robin.murphy@arm.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org One CPU operations is maintained through array @cpu_ops[NR_CPUS]. 2KB memory is consumed when CONFIG_NR_CPUS is set to 256. It seems too much memory has been used for this. Also, all CPUs must use same CPU operations and we shouldn't bring up the broken CPU, as Lorenzo Pieralisi pointed out. This introduces variable (@cpu_ops_index) to store the unified CPU operations index. The CPU, which has different index, won't be brought up. With this, the CPU operations dereferencing array is removed and 2KB memory is saved. Signed-off-by: Gavin Shan --- arch/arm64/kernel/cpu_ops.c | 62 ++++++++++++++++++++----------------- 1 file changed, 34 insertions(+), 28 deletions(-) diff --git a/arch/arm64/kernel/cpu_ops.c b/arch/arm64/kernel/cpu_ops.c index e133011f64b5..f59c087d6284 100644 --- a/arch/arm64/kernel/cpu_ops.c +++ b/arch/arm64/kernel/cpu_ops.c @@ -4,7 +4,6 @@ * * Copyright (C) 2013 ARM Ltd. */ - #include #include #include @@ -20,39 +19,32 @@ extern const struct cpu_operations acpi_parking_protocol_ops; #endif extern const struct cpu_operations cpu_psci_ops; -static const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init; - -static const struct cpu_operations *const dt_supported_cpu_ops[] __initconst = { +/* + * Each element of the index array is shared by 4 CPUs. It means each + * CPU index uses 2 bits. + */ +static const struct cpu_operations *const cpu_ops[] = { &smp_spin_table_ops, - &cpu_psci_ops, - NULL, -}; - -static const struct cpu_operations *const acpi_supported_cpu_ops[] __initconst = { #ifdef CONFIG_ARM64_ACPI_PARKING_PROTOCOL &acpi_parking_protocol_ops, #endif &cpu_psci_ops, - NULL, }; +static int cpu_ops_index __ro_after_init = INT_MAX; -static const struct cpu_operations * __init cpu_get_ops(const char *name) +static int __init get_cpu_ops_index(const char *name) { - const struct cpu_operations *const *ops; - - ops = acpi_disabled ? dt_supported_cpu_ops : acpi_supported_cpu_ops; - - while (*ops) { - if (!strcmp(name, (*ops)->name)) - return *ops; + int index; - ops++; + for (index = 0; index < ARRAY_SIZE(cpu_ops); index++) { + if (!strcmp(cpu_ops[index]->name, name)) + return index; } - return NULL; + return -ERANGE; } -static const char *__init cpu_read_enable_method(int cpu) +static const char *__init get_cpu_method(int cpu) { const char *enable_method; @@ -93,26 +85,40 @@ static const char *__init cpu_read_enable_method(int cpu) return enable_method; } -/* - * Read a cpu's enable method and record it in cpu_ops. - */ + int __init init_cpu_ops(int cpu) { - const char *enable_method = cpu_read_enable_method(cpu); + const char *enable_method = get_cpu_method(cpu); + int index; if (!enable_method) return -ENODEV; - cpu_ops[cpu] = cpu_get_ops(enable_method); - if (!cpu_ops[cpu]) { + index = get_cpu_ops_index(enable_method); + if (index < 0) { pr_warn("Unsupported enable-method: %s\n", enable_method); return -EOPNOTSUPP; } + /* Update the index directly if it's invalid */ + if (cpu_ops_index == INT_MAX) { + cpu_ops_index = index; + return 0; + } + + if (index != cpu_ops_index) { + pr_warn("Invalid CPU operations index %d (%d) on CPU %d\n", + index, cpu_ops_index, cpu); + return -EINVAL; + } + return 0; } const struct cpu_operations *get_cpu_ops(int cpu) { - return cpu_ops[cpu]; + if (cpu_ops_index == INT_MAX) + return NULL; + + return cpu_ops[cpu_ops_index]; }