From patchwork Wed Feb 12 22:23:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Lebedev X-Patchwork-Id: 11379243 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A58C51800 for ; Wed, 12 Feb 2020 22:25:32 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8388A21734 for ; Wed, 12 Feb 2020 22:25:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="WB6JVwG0"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="U4aLdABN" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8388A21734 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=CtVs52YOHS0yCAZPivpUiXIWRMoN5tHt3pmAIqeu0DY=; b=WB6JVwG06EtxE/ 4XA3XHSUUE4mFDKZbLLF6+E7ea8jE6IsHFZ5O/R0SegcXcFlPBvyyQWDjtwx9wukZChpczeOU1gmq T17sJx4yDvlRROjJhyMxt7qx+XXU9gietIsfoKulWyFpTC+l99lOWX5X/eRCt5LQheq2I2vHX83Wl qvTJEOMsBVC/wA1PQX1ANzsyNdUKSFZ7aaX+ExpDOZ9+8gdIqBJU99ctBBQlck3WGtBVAC6ELsqFU Suu3pSVlQX/wac6OdwlQ99y6cnTNKHEe9kUini0VUCXzgV4biEwIvZbGbRnuJ8dw0O8S3qqiEbTFc H3GmxLHozGqeWM7b7iLw==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1j20Rj-0003JH-B2; Wed, 12 Feb 2020 22:25:27 +0000 Received: from mail-lj1-x243.google.com ([2a00:1450:4864:20::243]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1j20Rf-0003Fy-0S for linux-arm-kernel@lists.infradead.org; Wed, 12 Feb 2020 22:25:25 +0000 Received: by mail-lj1-x243.google.com with SMTP id a13so4223260ljm.10 for ; Wed, 12 Feb 2020 14:25:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0CUbHP/EPh4AO1uTbHnps+SXg3HP5g8yx8ixZz33gns=; b=U4aLdABNtOOCi2r88ChEahVs9MTkIkcbzK+CNIaOopWiBG9RWs1B8wUTNGrnUAzTZh Zx6pmY6Wil2vorbs1/tkNhQW72wSw9SsGuXxLcPBervl/BWc6juD9hVue51nNX3VTNXy 4cvc5/wbx1XPMqBBRsEm5mYreaQjhGYnu+wb3BoejUdP8QkMEKkskPkuhsq3Xz/lhog0 LhzwjeMm8ZQqTDrYBj35XidQ5oOBsP77lO0pp2SXtN948wz7p+igJBlIIGvjPFIWt3bb 6R2i1Z7KSCrpm8S6YZ36dYBXEQ4Q/qY70r4bBjDl1nx+wWFt55ZnIazqCbH9G3WWl3Qw EuPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0CUbHP/EPh4AO1uTbHnps+SXg3HP5g8yx8ixZz33gns=; b=VkEB9YflgPU5Tus0XBysSmX+l2mFsBlJszqqJgDtupnoJy+wFFETWpYWg4RFZReNVF AW39wVnyoIrvLvIAghD+u2feH7BXf7eJyJNa+EAABlRN2igVOtb7PdJAAF3eocsnx3mI jx9uYrS+uLeJxrNn3hKpO0ZPf8iipfpiCVNhnJVS2Tsdx3IIW19lHRZgp3cGzLWUMYpM ewY5QZFl+ek6Zsem6AuBwVk3iUiZAFZhp3qIXuheom5UbvNteCpXsT6HNIajdUp00gYN db217B3gtsF8/XBMQ5MnaDz/nHxEsB8wyj7SzxQ+jG4hKDaWpVn33e1GSshR9x/887zJ I0Zg== X-Gm-Message-State: APjAAAUuuAMLfbHeHOrYxtnv0i+vgJa+EY/CG59WsL1Pn/5K2eMxpFdx qg2uhIig8qwzGr1D3Qrpuho= X-Google-Smtp-Source: APXvYqx+Gyj2x6H2HEYYeBRlNwVQLOMAPueoHPhtXwOT5KaW+fSfVjeng+C+acSytTn+85kmx9Ms3Q== X-Received: by 2002:a2e:995a:: with SMTP id r26mr9480280ljj.78.1581546320307; Wed, 12 Feb 2020 14:25:20 -0800 (PST) Received: from localhost.localdomain ([5.20.204.163]) by smtp.gmail.com with ESMTPSA id 126sm188008lfm.38.2020.02.12.14.25.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 12 Feb 2020 14:25:19 -0800 (PST) From: andrey.lebedev@gmail.com To: mripard@kernel.org, wens@csie.org, airlied@linux.ie, daniel@ffwll.ch, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] ARM: sun7i: Support LVDS output on Allwinner A20 Date: Thu, 13 Feb 2020 00:23:55 +0200 Message-Id: <20200212222355.17141-1-andrey.lebedev@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200210195633.GA21832@kedthinkpad> References: <20200210195633.GA21832@kedthinkpad> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200212_142523_090075_037B9E03 X-CRM114-Status: GOOD ( 16.13 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:243 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider [andrey.lebedev[at]gmail.com] 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrey Lebedev , linux-sunxi@googlegroups.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Andrey Lebedev A20 SoC (found in Cubieboard 2 among others) requires different LVDS set up procedure than A33. Timing controller (tcon) driver only implements sun6i-style procedure, that doesn't work on A20 (sun7i). Signed-off-by: Andrey Lebedev --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 95 ++++++++++++++++++++---------- drivers/gpu/drm/sun4i/sun4i_tcon.h | 14 +++++ 2 files changed, 77 insertions(+), 32 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index c81cdce6ed55..e4c605ca685e 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -114,46 +114,73 @@ static void sun4i_tcon_channel_set_status(struct sun4i_tcon *tcon, int channel, } } +static void sun6i_tcon_setup_lvds_phy(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder) +{ + u8 val; + + regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN6I_TCON0_LVDS_ANA0_C(2) | + SUN6I_TCON0_LVDS_ANA0_V(3) | + SUN6I_TCON0_LVDS_ANA0_PD(2) | + SUN6I_TCON0_LVDS_ANA0_EN_LDO); + udelay(2); + + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN6I_TCON0_LVDS_ANA0_EN_MB, + SUN6I_TCON0_LVDS_ANA0_EN_MB); + udelay(2); + + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN6I_TCON0_LVDS_ANA0_EN_DRVC, + SUN6I_TCON0_LVDS_ANA0_EN_DRVC); + + if (sun4i_tcon_get_pixel_depth(encoder) == 18) + val = 7; + else + val = 0xf; + + regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN6I_TCON0_LVDS_ANA0_EN_DRVD(0xf), + SUN6I_TCON0_LVDS_ANA0_EN_DRVD(val)); + +} + +static void sun4i_tcon_setup_lvds_phy(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder) +{ + regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_CK_EN | + SUN4I_TCON0_LVDS_ANA0_REG_V | + SUN4I_TCON0_LVDS_ANA0_REG_C | + SUN4I_TCON0_LVDS_ANA0_EN_MB | + SUN4I_TCON0_LVDS_ANA0_PD | + SUN4I_TCON0_LVDS_ANA0_DCHS); + + udelay(2); /* delay at least 1200 ns */ + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA1_REG, + SUN4I_TCON0_LVDS_ANA1_INIT, + SUN4I_TCON0_LVDS_ANA1_INIT); + udelay(1); /* delay at least 120 ns */ + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA1_REG, + SUN4I_TCON0_LVDS_ANA1_UPDATE, + SUN4I_TCON0_LVDS_ANA1_UPDATE); + regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, + SUN4I_TCON0_LVDS_ANA0_EN_MB, + SUN4I_TCON0_LVDS_ANA0_EN_MB); +} + + static void sun4i_tcon_lvds_set_status(struct sun4i_tcon *tcon, const struct drm_encoder *encoder, bool enabled) { if (enabled) { - u8 val; - regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, SUN4I_TCON0_LVDS_IF_EN, SUN4I_TCON0_LVDS_IF_EN); - - /* - * As their name suggest, these values only apply to the A31 - * and later SoCs. We'll have to rework this when merging - * support for the older SoCs. - */ - regmap_write(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, - SUN6I_TCON0_LVDS_ANA0_C(2) | - SUN6I_TCON0_LVDS_ANA0_V(3) | - SUN6I_TCON0_LVDS_ANA0_PD(2) | - SUN6I_TCON0_LVDS_ANA0_EN_LDO); - udelay(2); - - regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, - SUN6I_TCON0_LVDS_ANA0_EN_MB, - SUN6I_TCON0_LVDS_ANA0_EN_MB); - udelay(2); - - regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, - SUN6I_TCON0_LVDS_ANA0_EN_DRVC, - SUN6I_TCON0_LVDS_ANA0_EN_DRVC); - - if (sun4i_tcon_get_pixel_depth(encoder) == 18) - val = 7; - else - val = 0xf; - - regmap_write_bits(tcon->regs, SUN4I_TCON0_LVDS_ANA0_REG, - SUN6I_TCON0_LVDS_ANA0_EN_DRVD(0xf), - SUN6I_TCON0_LVDS_ANA0_EN_DRVD(val)); + if (tcon->quirks->setup_lvds_phy) + tcon->quirks->setup_lvds_phy(tcon, encoder); } else { regmap_update_bits(tcon->regs, SUN4I_TCON0_LVDS_IF_REG, SUN4I_TCON0_LVDS_IF_EN, 0); @@ -1454,23 +1481,27 @@ static const struct sun4i_tcon_quirks sun6i_a31s_quirks = { }; static const struct sun4i_tcon_quirks sun7i_a20_quirks = { + .supports_lvds = true, .has_channel_0 = true, .has_channel_1 = true, .dclk_min_div = 4, /* Same display pipeline structure as A10 */ .set_mux = sun4i_a10_tcon_set_mux, + .setup_lvds_phy = sun4i_tcon_setup_lvds_phy, }; static const struct sun4i_tcon_quirks sun8i_a33_quirks = { .has_channel_0 = true, .has_lvds_alt = true, .dclk_min_div = 1, + .setup_lvds_phy = sun6i_tcon_setup_lvds_phy, }; static const struct sun4i_tcon_quirks sun8i_a83t_lcd_quirks = { .supports_lvds = true, .has_channel_0 = true, .dclk_min_div = 1, + .setup_lvds_phy = sun6i_tcon_setup_lvds_phy, }; static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.h b/drivers/gpu/drm/sun4i/sun4i_tcon.h index a62ec826ae71..cfbf4e6c1679 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.h +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.h @@ -193,6 +193,13 @@ #define SUN4I_TCON_MUX_CTRL_REG 0x200 #define SUN4I_TCON0_LVDS_ANA0_REG 0x220 +#define SUN4I_TCON0_LVDS_ANA0_DCHS BIT(16) +#define SUN4I_TCON0_LVDS_ANA0_PD (BIT(20) | BIT(21)) +#define SUN4I_TCON0_LVDS_ANA0_EN_MB BIT(22) +#define SUN4I_TCON0_LVDS_ANA0_REG_C (BIT(24) | BIT(25)) +#define SUN4I_TCON0_LVDS_ANA0_REG_V (BIT(26) | BIT(27)) +#define SUN4I_TCON0_LVDS_ANA0_CK_EN (BIT(29) | BIT(28)) + #define SUN6I_TCON0_LVDS_ANA0_EN_MB BIT(31) #define SUN6I_TCON0_LVDS_ANA0_EN_LDO BIT(30) #define SUN6I_TCON0_LVDS_ANA0_EN_DRVC BIT(24) @@ -201,6 +208,10 @@ #define SUN6I_TCON0_LVDS_ANA0_V(x) (((x) & 3) << 8) #define SUN6I_TCON0_LVDS_ANA0_PD(x) (((x) & 3) << 4) +#define SUN4I_TCON0_LVDS_ANA1_REG 0x224 +#define SUN4I_TCON0_LVDS_ANA1_INIT (0x1f << 26 | 0x1f << 10) +#define SUN4I_TCON0_LVDS_ANA1_UPDATE (0x1f << 16 | 0x1f << 00) + #define SUN4I_TCON1_FILL_CTL_REG 0x300 #define SUN4I_TCON1_FILL_BEG0_REG 0x304 #define SUN4I_TCON1_FILL_END0_REG 0x308 @@ -228,6 +239,9 @@ struct sun4i_tcon_quirks { /* callback to handle tcon muxing options */ int (*set_mux)(struct sun4i_tcon *, const struct drm_encoder *); + /* handler for LVDS setup routine */ + void (*setup_lvds_phy)(struct sun4i_tcon *tcon, + const struct drm_encoder *encoder); }; struct sun4i_tcon {