From patchwork Tue Mar 17 09:41:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tretter X-Patchwork-Id: 11442283 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2FF8414B4 for ; Tue, 17 Mar 2020 09:42:26 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0E42B20724 for ; Tue, 17 Mar 2020 09:42:26 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Pk0Mp6hE" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0E42B20724 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=jPPQLwoSS4v5Gg1tUXNCDEGToQvDELA++1WSa2pY9D0=; b=Pk0Mp6hEtKVmH4 LeqB1TEeLAzKhAe1KzCHcAnVN3Kl05o3WoCHrSGYIDHa2vy1Y2gainx+iPFyKCFBa/VFjHyElzp4k p6rF7aan45MdUqf+Texm9Bjh6Ako4FwjXomrvI1XUPAJJfeRve+Ic5UBmH2gUpn8ij0VVioJ6kvgt XE7UHLnp4ZA1ly4pvPQsezb0TZG6NX2nDbv15FcZlufclw4e2WmeqiU7eV3kp93BlS+2XtTlCXQbz j9z/0k/EzRf6qksfWsTCBLFLfQw8IoAHtx2OPOS8mpk2+WYmoxxjQarixgIPrXWlZgRwLYJQCa+jy ABLbVEWygqjvxZL0Dp/A==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jE8jw-00074k-8O; Tue, 17 Mar 2020 09:42:24 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jE8j1-00062Q-Av for linux-arm-kernel@lists.infradead.org; Tue, 17 Mar 2020 09:41:30 +0000 Received: from dude02.hi.pengutronix.de ([2001:67c:670:100:1d::28] helo=dude02.lab.pengutronix.de) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1jE8ix-0004Q8-2M; Tue, 17 Mar 2020 10:41:23 +0100 Received: from mtr by dude02.lab.pengutronix.de with local (Exim 4.92) (envelope-from ) id 1jE8iw-00049Q-F6; Tue, 17 Mar 2020 10:41:22 +0100 From: Michael Tretter To: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org Subject: [PATCH 3/6] soc: xilinx: vcu: implement clock provider for output clocks Date: Tue, 17 Mar 2020 10:41:12 +0100 Message-Id: <20200317094115.15896-4-m.tretter@pengutronix.de> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200317094115.15896-1-m.tretter@pengutronix.de> References: <20200317094115.15896-1-m.tretter@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2001:67c:670:100:1d::28 X-SA-Exim-Mail-From: mtr@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200317_024127_401146_6E05AFD7 X-CRM114-Status: GOOD ( 15.55 ) X-Spam-Score: 0.0 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Dhaval Shah , Rob Herring , Michal Simek , kernel@pengutronix.de, Michael Tretter Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The VCU System-Level Control uses an internal PLL to drive the core and MCU clock for the allegro encoder and decoder based on an external PL clock. In order be able to ensure that the clocks are enabled and to get their rate from other drivers, the module must implement a clock provider and register the clocks at the common clock framework. Other drivers are then able to access the clock via devicetree bindings. Signed-off-by: Michael Tretter --- drivers/soc/xilinx/Kconfig | 2 +- drivers/soc/xilinx/xlnx_vcu.c | 69 ++++++++++++++++++++++++++++++++++- 2 files changed, 68 insertions(+), 3 deletions(-) diff --git a/drivers/soc/xilinx/Kconfig b/drivers/soc/xilinx/Kconfig index 223f1f9d0922..331f124902e8 100644 --- a/drivers/soc/xilinx/Kconfig +++ b/drivers/soc/xilinx/Kconfig @@ -3,7 +3,7 @@ menu "Xilinx SoC drivers" config XILINX_VCU tristate "Xilinx VCU logicoreIP Init" - depends on HAS_IOMEM + depends on HAS_IOMEM && COMMON_CLK help Provides the driver to enable and disable the isolation between the processing system and programmable logic part by using the logicoreIP diff --git a/drivers/soc/xilinx/xlnx_vcu.c b/drivers/soc/xilinx/xlnx_vcu.c index dcd8e7824b06..d69e671efeab 100644 --- a/drivers/soc/xilinx/xlnx_vcu.c +++ b/drivers/soc/xilinx/xlnx_vcu.c @@ -7,6 +7,7 @@ * Contacts Dhaval Shah */ #include +#include #include #include #include @@ -14,6 +15,8 @@ #include #include +#include + /* Address map for different registers implemented in the VCU LogiCORE IP. */ #define VCU_ECODER_ENABLE 0x00 #define VCU_DECODER_ENABLE 0x04 @@ -108,7 +111,9 @@ struct xvcu_device { struct clk *aclk; void __iomem *logicore_reg_ba; void __iomem *vcu_slcr_ba; + struct clk_onecell_data clk_data; u32 coreclk; + u32 mcuclk; }; /** @@ -375,10 +380,10 @@ static int xvcu_set_vcu_pll_info(struct xvcu_device *xvcu) } xvcu->coreclk = pll_clk / divisor_core; - mcuclk = pll_clk / divisor_mcu; + xvcu->mcuclk = pll_clk / divisor_mcu; dev_dbg(xvcu->dev, "Actual Ref clock freq is %uHz\n", refclk); dev_dbg(xvcu->dev, "Actual Core clock freq is %uHz\n", xvcu->coreclk); - dev_dbg(xvcu->dev, "Actual Mcu clock freq is %uHz\n", mcuclk); + dev_dbg(xvcu->dev, "Actual Mcu clock freq is %uHz\n", xvcu->mcuclk); vcu_pll_ctrl &= ~(VCU_PLL_CTRL_FBDIV_MASK << VCU_PLL_CTRL_FBDIV_SHIFT); vcu_pll_ctrl |= (found->fbdiv & VCU_PLL_CTRL_FBDIV_MASK) << @@ -485,6 +490,56 @@ static int xvcu_set_pll(struct xvcu_device *xvcu) return -ETIMEDOUT; } +static int xvcu_register_clock_provider(struct xvcu_device *xvcu) +{ + struct device *dev = xvcu->dev; + const char *parent_name = __clk_get_name(xvcu->pll_ref); + struct clk_onecell_data *data = &xvcu->clk_data; + struct clk **clks; + size_t num_clks = CLK_XVCU_MAX; + + clks = devm_kcalloc(dev, num_clks, sizeof(*clks), GFP_KERNEL); + if (!clks) + return -ENOMEM; + + data->clk_num = num_clks; + data->clks = clks; + + clks[CLK_XVCU_ENC_CORE] = + clk_register_fixed_rate(dev, "venc_core_clk", + parent_name, 0, xvcu->coreclk); + clks[CLK_XVCU_ENC_MCU] = + clk_register_fixed_rate(dev, "venc_mcu_clk", + parent_name, 0, xvcu->mcuclk); + clks[CLK_XVCU_DEC_CORE] = + clk_register_fixed_rate(dev, "vdec_core_clk", + parent_name, 0, xvcu->coreclk); + clks[CLK_XVCU_DEC_MCU] = + clk_register_fixed_rate(dev, "vdec_mcu_clk", + parent_name, 0, xvcu->mcuclk); + + return of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, data); +} + +static void xvcu_unregister_clock_provider(struct xvcu_device *xvcu) +{ + struct device *dev = xvcu->dev; + + of_clk_del_provider(dev->of_node); +} + +static void xvcu_reset(struct xvcu_device *xvcu) +{ + if (!xvcu->reset_gpio) + return; + + gpiod_set_value(xvcu->reset_gpio, 0); + /* min 2 clock cycle of vcu pll_ref, slowest freq is 33.33KHz */ + usleep_range(60, 120); + gpiod_set_value(xvcu->reset_gpio, 1); + usleep_range(60, 120); +} + /** * xvcu_probe - Probe existence of the logicoreIP * and initialize PLL @@ -569,10 +624,18 @@ static int xvcu_probe(struct platform_device *pdev) goto error_pll_ref; } + ret = xvcu_register_clock_provider(xvcu); + if (ret) { + dev_err(&pdev->dev, "failed to register clock provider\n"); + goto error_clk_provider; + } + dev_set_drvdata(&pdev->dev, xvcu); return 0; +error_clk_provider: + xvcu_unregister_clock_provider(xvcu); error_pll_ref: clk_disable_unprepare(xvcu->pll_ref); error_aclk: @@ -596,6 +659,8 @@ static int xvcu_remove(struct platform_device *pdev) if (!xvcu) return -ENODEV; + xvcu_unregister_clock_provider(xvcu); + /* Add the the Gasket isolation and put the VCU in reset. */ xvcu_write(xvcu->logicore_reg_ba, VCU_GASKET_INIT, 0);