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Wed, 18 Mar 2020 10:42:27 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Subject: [PATCH 05/21] clocksource/drivers/owl: Improve owl_timer_init fail messages Date: Wed, 18 Mar 2020 18:41:15 +0100 Message-Id: <20200318174131.20582-5-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200318174131.20582-1-daniel.lezcano@linaro.org> References: <20200318174131.20582-1-daniel.lezcano@linaro.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200318_104230_109080_79570160 X-CRM114-Status: GOOD ( 11.34 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no trust [2a00:1450:4864:20:0:0:0:443 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "moderated list:ARM/ACTIONS SEMI ARCHITECTURE" , Manivannan Sadhasivam , linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Matheus Castello MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org From: Matheus Castello Check the return from clocksource_mmio_init, add messages in case of an error and in case of not having a defined clock property. Signed-off-by: Matheus Castello Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200219004810.411190-1-matheus@castello.eng.br --- drivers/clocksource/timer-owl.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/drivers/clocksource/timer-owl.c b/drivers/clocksource/timer-owl.c index 900fe736145d..ac97420bfa7c 100644 --- a/drivers/clocksource/timer-owl.c +++ b/drivers/clocksource/timer-owl.c @@ -135,8 +135,11 @@ static int __init owl_timer_init(struct device_node *node) } clk = of_clk_get(node, 0); - if (IS_ERR(clk)) - return PTR_ERR(clk); + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + pr_err("Failed to get clock for clocksource (%d)\n", ret); + return ret; + } rate = clk_get_rate(clk); @@ -144,8 +147,12 @@ static int __init owl_timer_init(struct device_node *node) owl_timer_set_enabled(owl_clksrc_base, true); sched_clock_register(owl_timer_sched_read, 32, rate); - clocksource_mmio_init(owl_clksrc_base + OWL_Tx_VAL, node->name, - rate, 200, 32, clocksource_mmio_readl_up); + ret = clocksource_mmio_init(owl_clksrc_base + OWL_Tx_VAL, node->name, + rate, 200, 32, clocksource_mmio_readl_up); + if (ret) { + pr_err("Failed to register clocksource (%d)\n", ret); + return ret; + } owl_timer_reset(owl_clkevt_base);