Message ID | 20200328023353.156929-1-aford173@gmail.com (mailing list archive) |
---|---|
State | Mainlined |
Commit | 15ddc3e17aec0de4c69d595b873e184432b9791d |
Headers | show |
Series | arm64: dts: imx8mn: Change SDMA1 ahb clock for imx8mn | expand |
On Fri, Mar 27, 2020 at 09:33:53PM -0500, Adam Ford wrote: > Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error. > This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the > timeout error. > > Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") > > Signed-off-by: Adam Ford <aford173@gmail.com> Applied, thanks.
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index a44b5438e842..882e913436ca 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -661,7 +661,7 @@ sdma1: dma-controller@30bd0000 { reg = <0x30bd0000 0x10000>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk IMX8MN_CLK_SDMA1_ROOT>, - <&clk IMX8MN_CLK_SDMA1_ROOT>; + <&clk IMX8MN_CLK_AHB>; clock-names = "ipg", "ahb"; #dma-cells = <3>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin";
Using SDMA1 with UART1 is causing a "Timeout waiting for CH0" error. This patch changes to ahb clock from SDMA1_ROOT to AHB which fixes the timeout error. Fixes: 6c3debcbae47 ("arm64: dts: freescale: Add i.MX8MN dtsi support") Signed-off-by: Adam Ford <aford173@gmail.com>