From patchwork Wed Apr 15 07:28:35 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zenghui Yu X-Patchwork-Id: 11489989 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E141514B4 for ; Wed, 15 Apr 2020 07:29:37 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BBD5820775 for ; Wed, 15 Apr 2020 07:29:37 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="jDFJ0ynH" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BBD5820775 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:To :From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=yeJO0lucJhJPnebtdyzk1GkBYcfnKexAxlXx7nI3lR4=; b=jDFJ0ynHJdQaDd v/AJR7NYae1uYDtSYpMui70ejSFIeq5pXBSLN5/KFcFHENOh7e6LRVEzdAL4PySsfG12JMjPNSApP vB3JHeTvPtvC0BC29vKSAjiej1CcSmKErjCRK+wgXt+rNoFmx/JYaNODj6Be3gWqdyiRYBeNdfPKl EjsoRXvUzt8qP2u8o0VD1qIi5jy29qQ3x5/E37LdKnUAyChmFg/hbH82OO6IKEdwKLDna3ZrBWRON SQ+iDkpACL2xPa71C/dGoH0MCUmg6ZD0GfPQ+QNqOMTq5dOb/tKva3o0qPiWNn+0VwPaSXT8/tsi0 kiyKwFSttaALlQb2WjiA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jOcUH-0005cs-Pm; Wed, 15 Apr 2020 07:29:33 +0000 Received: from szxga04-in.huawei.com ([45.249.212.190] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jOcUE-0005a7-7D for linux-arm-kernel@lists.infradead.org; Wed, 15 Apr 2020 07:29:31 +0000 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 2FA05A3C4D514F23AA5D; Wed, 15 Apr 2020 15:29:14 +0800 (CST) Received: from DESKTOP-8RFUVS3.china.huawei.com (10.173.222.27) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.487.0; Wed, 15 Apr 2020 15:29:08 +0800 From: Zenghui Yu To: , , Subject: [PATCH RFC] KVM: arm64: Sidestep stage2_unmap_vm() on vcpu reset when S2FWB is supported Date: Wed, 15 Apr 2020 15:28:35 +0800 Message-ID: <20200415072835.1164-1-yuzenghui@huawei.com> X-Mailer: git-send-email 2.23.0.windows.1 MIME-Version: 1.0 X-Originating-IP: [10.173.222.27] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200415_002930_429476_76CB20F7 X-CRM114-Status: GOOD ( 11.20 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on bombadil.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.190 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Suzuki K Poulose , Marc Zyngier , Christoffer Dall , James Morse , Zenghui Yu , wanghaibin.wang@huawei.com, Julien Thierry Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org stage2_unmap_vm() was introduced to unmap user RAM region in the stage2 page table to make the caches coherent. E.g., a guest reboot with stage1 MMU disabled will access memory using non-cacheable attributes. If the RAM and caches are not coherent at this stage, some evicted dirty cache line may go and corrupt guest data in RAM. Since ARMv8.4, S2FWB feature is mandatory and KVM will take advantage of it to configure the stage2 page table and the attributes of memory access. So we ensure that guests always access memory using cacheable attributes and thus, the caches always be coherent. So on CPUs that support S2FWB, we can safely reset the vcpu without a heavy stage2 unmapping. Cc: Marc Zyngier Cc: Christoffer Dall Cc: James Morse Cc: Julien Thierry Cc: Suzuki K Poulose Signed-off-by: Zenghui Yu Reported-by: Alexandru Elisei Signed-off-by: Marc Zyngier Reviewed-by: Alexandru Elisei --- If this is correct, there should be a great performance improvement on a guest reboot (or reset) on systems support S2FWB. But I'm afraid that I've missed some points here, so please comment! The commit 957db105c997 ("arm/arm64: KVM: Introduce stage2_unmap_vm") was merged about six years ago and I failed to track its histroy and intention. Instead of a whole stage2 unmapping, something like stage2_flush_vm() looks enough to me. But again, I'm unsure... Thanks for having a look! virt/kvm/arm/arm.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c index 48d0ec44ad77..e6378162cdef 100644 --- a/virt/kvm/arm/arm.c +++ b/virt/kvm/arm/arm.c @@ -983,8 +983,11 @@ static int kvm_arch_vcpu_ioctl_vcpu_init(struct kvm_vcpu *vcpu, /* * Ensure a rebooted VM will fault in RAM pages and detect if the * guest MMU is turned off and flush the caches as needed. + * + * S2FWB enforces all memory accesses to RAM being cacheable, we + * ensure that the cache is always coherent. */ - if (vcpu->arch.has_run_once) + if (vcpu->arch.has_run_once && !cpus_have_const_cap(ARM64_HAS_STAGE2_FWB)) stage2_unmap_vm(vcpu->kvm); vcpu_reset_hcr(vcpu);