diff mbox series

arm64: dts: allwinner: h6: fix cooling-cell property

Message ID 20200420143016.16835-1-peron.clem@gmail.com (mailing list archive)
State New, archived
Headers show
Series arm64: dts: allwinner: h6: fix cooling-cell property | expand

Commit Message

Clément Péron April 20, 2020, 2:30 p.m. UTC
We define cooling-cells property for CPUs only for board including
the sun50i-h6-cpu-opp.dtsi. As not all boards have the CPU OPP
dtsi file included this create a warning because the cooling-maps
is defined but not the cooling-cells property in CPU nodes.

Move the cooling-cells to the sun50i-h6.dtsi instead of the
sun50i-h6-cpu-opp.dtsi

Signed-off-by: Clément Péron <peron.clem@gmail.com>
---
 arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 4 ----
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi         | 4 ++++
 2 files changed, 4 insertions(+), 4 deletions(-)

Comments

Clément Péron April 23, 2020, 7:48 a.m. UTC | #1
Hi Maxime,

On Mon, 20 Apr 2020 at 16:30, Clément Péron <peron.clem@gmail.com> wrote:
>
> We define cooling-cells property for CPUs only for board including
> the sun50i-h6-cpu-opp.dtsi. As not all boards have the CPU OPP
> dtsi file included this create a warning because the cooling-maps
> is defined but not the cooling-cells property in CPU nodes.

This fix some warnings introduced by the H6 DVFS serie that I sent last week...

The cooling-cells has been introduced in
7e4bbf3fe67c ("arm64: dts: allwinner: h6: Add CPU Operating
Performance Points table")

instead of
5fc0928782e9 ("arm64: dts: allwinner: h6: Add thermal trip points/cooling map")

Do you plan to squash it? If yes do you want me to sent two patches
separately (it will be a bit easier to squash them)?

Regards,
Clement

>
> Move the cooling-cells to the sun50i-h6.dtsi instead of the
> sun50i-h6-cpu-opp.dtsi
>
> Signed-off-by: Clément Péron <peron.clem@gmail.com>
> ---
>  arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi | 4 ----
>  arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi         | 4 ++++
>  2 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
> index 9ebd97b04b1a..dcb789519797 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
> @@ -102,20 +102,16 @@
>
>  &cpu0 {
>         operating-points-v2 = <&cpu_opp_table>;
> -       #cooling-cells = <2>;
>  };
>
>  &cpu1 {
>         operating-points-v2 = <&cpu_opp_table>;
> -       #cooling-cells = <2>;
>  };
>
>  &cpu2 {
>         operating-points-v2 = <&cpu_opp_table>;
> -       #cooling-cells = <2>;
>  };
>
>  &cpu3 {
>         operating-points-v2 = <&cpu_opp_table>;
> -       #cooling-cells = <2>;
>  };
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 83e32f9c4977..2e31632c6ca8 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -27,6 +27,7 @@
>                         enable-method = "psci";
>                         clocks = <&ccu CLK_CPUX>;
>                         clock-latency-ns = <244144>; /* 8 32k periods */
> +                       #cooling-cells = <2>;
>                 };
>
>                 cpu1: cpu@1 {
> @@ -36,6 +37,7 @@
>                         enable-method = "psci";
>                         clocks = <&ccu CLK_CPUX>;
>                         clock-latency-ns = <244144>; /* 8 32k periods */
> +                       #cooling-cells = <2>;
>                 };
>
>                 cpu2: cpu@2 {
> @@ -45,6 +47,7 @@
>                         enable-method = "psci";
>                         clocks = <&ccu CLK_CPUX>;
>                         clock-latency-ns = <244144>; /* 8 32k periods */
> +                       #cooling-cells = <2>;
>                 };
>
>                 cpu3: cpu@3 {
> @@ -54,6 +57,7 @@
>                         enable-method = "psci";
>                         clocks = <&ccu CLK_CPUX>;
>                         clock-latency-ns = <244144>; /* 8 32k periods */
> +                       #cooling-cells = <2>;
>                 };
>         };
>
> --
> 2.20.1
>
Maxime Ripard April 23, 2020, 9:44 a.m. UTC | #2
On Mon, Apr 20, 2020 at 04:30:16PM +0200, Clément Péron wrote:
> We define cooling-cells property for CPUs only for board including
> the sun50i-h6-cpu-opp.dtsi. As not all boards have the CPU OPP
> dtsi file included this create a warning because the cooling-maps
> is defined but not the cooling-cells property in CPU nodes.
> 
> Move the cooling-cells to the sun50i-h6.dtsi instead of the
> sun50i-h6-cpu-opp.dtsi
> 
> Signed-off-by: Clément Péron <peron.clem@gmail.com>

Squashed it into the patches 2 and 3 of your series,
Thanks!
Maxime
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
index 9ebd97b04b1a..dcb789519797 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
@@ -102,20 +102,16 @@ 
 
 &cpu0 {
 	operating-points-v2 = <&cpu_opp_table>;
-	#cooling-cells = <2>;
 };
 
 &cpu1 {
 	operating-points-v2 = <&cpu_opp_table>;
-	#cooling-cells = <2>;
 };
 
 &cpu2 {
 	operating-points-v2 = <&cpu_opp_table>;
-	#cooling-cells = <2>;
 };
 
 &cpu3 {
 	operating-points-v2 = <&cpu_opp_table>;
-	#cooling-cells = <2>;
 };
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
index 83e32f9c4977..2e31632c6ca8 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -27,6 +27,7 @@ 
 			enable-method = "psci";
 			clocks = <&ccu CLK_CPUX>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
+			#cooling-cells = <2>;
 		};
 
 		cpu1: cpu@1 {
@@ -36,6 +37,7 @@ 
 			enable-method = "psci";
 			clocks = <&ccu CLK_CPUX>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
+			#cooling-cells = <2>;
 		};
 
 		cpu2: cpu@2 {
@@ -45,6 +47,7 @@ 
 			enable-method = "psci";
 			clocks = <&ccu CLK_CPUX>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
+			#cooling-cells = <2>;
 		};
 
 		cpu3: cpu@3 {
@@ -54,6 +57,7 @@ 
 			enable-method = "psci";
 			clocks = <&ccu CLK_CPUX>;
 			clock-latency-ns = <244144>; /* 8 32k periods */
+			#cooling-cells = <2>;
 		};
 	};