| Message ID | 20200420202612.369370-5-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | meson-ee-pwrc: support for Meson8/8b/8m2 and GX | expand |
On 20/04/2020 22:26, Martin Blumenstingl wrote: > Add support for the Meson GX SoCs to the meson-ee-pwrc driver. > > The power domains on the GX SoCs are very similar to G12A. The only > known differences so far are: > - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the > VPU power-domain) > - The GX SoCs have an additional reset line called "dvin" > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > drivers/soc/amlogic/meson-ee-pwrc.c | 26 ++++++++++++++++++++++++-- > 1 file changed, 24 insertions(+), 2 deletions(-) > > diff --git a/drivers/soc/amlogic/meson-ee-pwrc.c b/drivers/soc/amlogic/meson-ee-pwrc.c > index b30868da456a..a90572cb9c82 100644 > --- a/drivers/soc/amlogic/meson-ee-pwrc.c > +++ b/drivers/soc/amlogic/meson-ee-pwrc.c > @@ -16,6 +16,7 @@ > #include <linux/clk.h> > #include <dt-bindings/power/meson8-power.h> > #include <dt-bindings/power/meson-g12a-power.h> > +#include <dt-bindings/power/meson-gxbb-power.h> > #include <dt-bindings/power/meson-sm1-power.h> > > /* AO Offsets */ > @@ -73,7 +74,7 @@ struct meson_ee_pwrc_domain_data { > > /* TOP Power Domains */ > > -static struct meson_ee_pwrc_top_domain g12a_pwrc_vpu = { > +static struct meson_ee_pwrc_top_domain gxbb_pwrc_vpu = { I thing it could be renamed gx_pwrc_vpu, but it's not a strong one > .sleep_reg = AO_RTI_GEN_PWR_SLEEP0, > .sleep_mask = BIT(8), > .iso_reg = AO_RTI_GEN_PWR_SLEEP0, > @@ -138,6 +139,12 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = { > VPU_HHI_MEMPD(HHI_MEM_PD_REG0), > }; > > +static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = { > + VPU_MEMPD(HHI_VPU_MEM_PD_REG0), > + VPU_MEMPD(HHI_VPU_MEM_PD_REG1), > + VPU_HHI_MEMPD(HHI_MEM_PD_REG0), > +}; > + > static struct meson_ee_pwrc_mem_domain meson8_pwrc_mem_eth[] = { > { HHI_MEM_PD_REG0, GENMASK(3, 2) }, > }; > @@ -223,11 +230,17 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = { > static bool pwrc_ee_get_power(struct meson_ee_pwrc_domain *pwrc_domain); > > static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = { > - [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu, > + [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &gxbb_pwrc_vpu, g12a_pwrc_mem_vpu, > pwrc_ee_get_power, 11, 2), > [PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson8_pwrc_mem_eth), > }; > > +static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = { > + [PWRC_GXBB_VPU_ID] = VPU_PD("VPU", &gxbb_pwrc_vpu, gxbb_pwrc_mem_vpu, > + pwrc_ee_get_power, 12, 2), > + [PWRC_GXBB_ETHERNET_MEM_ID] = MEM_PD("ETH", meson8_pwrc_mem_eth), > +}; > + > static struct meson_ee_pwrc_domain_desc meson8_pwrc_domains[] = { > [PWRC_MESON8_VPU_ID] = VPU_PD("VPU", &meson8_pwrc_vpu, > meson8_pwrc_mem_vpu, pwrc_ee_get_power, > @@ -514,6 +527,11 @@ static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = { > .domains = g12a_pwrc_domains, > }; > > +static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = { > + .count = ARRAY_SIZE(gxbb_pwrc_domains), > + .domains = gxbb_pwrc_domains, > +}; > + > static struct meson_ee_pwrc_domain_data meson_ee_m8_pwrc_data = { > .count = ARRAY_SIZE(meson8_pwrc_domains), > .domains = meson8_pwrc_domains, > @@ -542,6 +560,10 @@ static const struct of_device_id meson_ee_pwrc_match_table[] = { > .compatible = "amlogic,meson8m2-pwrc", > .data = &meson_ee_m8b_pwrc_data, > }, > + { > + .compatible = "amlogic,meson-gxbb-pwrc", > + .data = &meson_ee_gxbb_pwrc_data, > + }, > { > .compatible = "amlogic,meson-g12a-pwrc", > .data = &meson_ee_g12a_pwrc_data, > Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
diff --git a/drivers/soc/amlogic/meson-ee-pwrc.c b/drivers/soc/amlogic/meson-ee-pwrc.c index b30868da456a..a90572cb9c82 100644 --- a/drivers/soc/amlogic/meson-ee-pwrc.c +++ b/drivers/soc/amlogic/meson-ee-pwrc.c @@ -16,6 +16,7 @@ #include <linux/clk.h> #include <dt-bindings/power/meson8-power.h> #include <dt-bindings/power/meson-g12a-power.h> +#include <dt-bindings/power/meson-gxbb-power.h> #include <dt-bindings/power/meson-sm1-power.h> /* AO Offsets */ @@ -73,7 +74,7 @@ struct meson_ee_pwrc_domain_data { /* TOP Power Domains */ -static struct meson_ee_pwrc_top_domain g12a_pwrc_vpu = { +static struct meson_ee_pwrc_top_domain gxbb_pwrc_vpu = { .sleep_reg = AO_RTI_GEN_PWR_SLEEP0, .sleep_mask = BIT(8), .iso_reg = AO_RTI_GEN_PWR_SLEEP0, @@ -138,6 +139,12 @@ static struct meson_ee_pwrc_mem_domain g12a_pwrc_mem_vpu[] = { VPU_HHI_MEMPD(HHI_MEM_PD_REG0), }; +static struct meson_ee_pwrc_mem_domain gxbb_pwrc_mem_vpu[] = { + VPU_MEMPD(HHI_VPU_MEM_PD_REG0), + VPU_MEMPD(HHI_VPU_MEM_PD_REG1), + VPU_HHI_MEMPD(HHI_MEM_PD_REG0), +}; + static struct meson_ee_pwrc_mem_domain meson8_pwrc_mem_eth[] = { { HHI_MEM_PD_REG0, GENMASK(3, 2) }, }; @@ -223,11 +230,17 @@ static struct meson_ee_pwrc_mem_domain sm1_pwrc_mem_audio[] = { static bool pwrc_ee_get_power(struct meson_ee_pwrc_domain *pwrc_domain); static struct meson_ee_pwrc_domain_desc g12a_pwrc_domains[] = { - [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &g12a_pwrc_vpu, g12a_pwrc_mem_vpu, + [PWRC_G12A_VPU_ID] = VPU_PD("VPU", &gxbb_pwrc_vpu, g12a_pwrc_mem_vpu, pwrc_ee_get_power, 11, 2), [PWRC_G12A_ETH_ID] = MEM_PD("ETH", meson8_pwrc_mem_eth), }; +static struct meson_ee_pwrc_domain_desc gxbb_pwrc_domains[] = { + [PWRC_GXBB_VPU_ID] = VPU_PD("VPU", &gxbb_pwrc_vpu, gxbb_pwrc_mem_vpu, + pwrc_ee_get_power, 12, 2), + [PWRC_GXBB_ETHERNET_MEM_ID] = MEM_PD("ETH", meson8_pwrc_mem_eth), +}; + static struct meson_ee_pwrc_domain_desc meson8_pwrc_domains[] = { [PWRC_MESON8_VPU_ID] = VPU_PD("VPU", &meson8_pwrc_vpu, meson8_pwrc_mem_vpu, pwrc_ee_get_power, @@ -514,6 +527,11 @@ static struct meson_ee_pwrc_domain_data meson_ee_g12a_pwrc_data = { .domains = g12a_pwrc_domains, }; +static struct meson_ee_pwrc_domain_data meson_ee_gxbb_pwrc_data = { + .count = ARRAY_SIZE(gxbb_pwrc_domains), + .domains = gxbb_pwrc_domains, +}; + static struct meson_ee_pwrc_domain_data meson_ee_m8_pwrc_data = { .count = ARRAY_SIZE(meson8_pwrc_domains), .domains = meson8_pwrc_domains, @@ -542,6 +560,10 @@ static const struct of_device_id meson_ee_pwrc_match_table[] = { .compatible = "amlogic,meson8m2-pwrc", .data = &meson_ee_m8b_pwrc_data, }, + { + .compatible = "amlogic,meson-gxbb-pwrc", + .data = &meson_ee_gxbb_pwrc_data, + }, { .compatible = "amlogic,meson-g12a-pwrc", .data = &meson_ee_g12a_pwrc_data,
Add support for the Meson GX SoCs to the meson-ee-pwrc driver. The power domains on the GX SoCs are very similar to G12A. The only known differences so far are: - The GX SoCs do not have the HHI_VPU_MEM_PD_REG2 register (for the VPU power-domain) - The GX SoCs have an additional reset line called "dvin" Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- drivers/soc/amlogic/meson-ee-pwrc.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-)