| Message ID | 20200513103016.130417-17-andre.przywara@arm.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 36d48981d6adf2d3a1d9713df7c145b6f4b4ef22 |
| Headers | show |
| Series | dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" | expand |
On Wed, May 13, 2020 at 11:30:12AM +0100, Andre Przywara wrote: > The Mali binding insists on the GPU interrupts to be in ordered as: job, > mmu, gpu. > Sort the GPU interrupts and interrupt-names properties accordingly. > I assume this is not a bug fix, just clean up to make it 100% binding compliant. Things work just fine without this too. Just for my info.
On 13/05/2020 19:24, Sudeep Holla wrote: Hi, > On Wed, May 13, 2020 at 11:30:12AM +0100, Andre Przywara wrote: >> The Mali binding insists on the GPU interrupts to be in ordered as: job, >> mmu, gpu. >> Sort the GPU interrupts and interrupt-names properties accordingly. >> > > I assume this is not a bug fix, just clean up to make it 100% binding > compliant. Things work just fine without this too. Just for my info. Yes, that's true, it works either way right now. Originally I was under the impression that the purpose of interrupt-names was to allow any order of interrupts, but according to Rob this is just to support optional IRQs (so having a shorter list). The bindings require a certain order, and the dt-schema validation complains if that differs in the DT. Cheers, Andre
diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi index bd4e0b15f9c8..9228d1b60358 100644 --- a/arch/arm64/boot/dts/arm/juno-base.dtsi +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi @@ -501,10 +501,10 @@ gpu: gpu@2d000000 { compatible = "arm,juno-mali", "arm,mali-t624"; reg = <0 0x2d000000 0 0x10000>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "gpu", "job", "mmu"; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "job", "mmu", "gpu"; clocks = <&scpi_dvfs 2>; power-domains = <&scpi_devpd 1>; dma-coherent;
The Mali binding insists on the GPU interrupts to be in ordered as: job, mmu, gpu. Sort the GPU interrupts and interrupt-names properties accordingly. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm64/boot/dts/arm/juno-base.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)