@@ -1130,7 +1130,8 @@ r_cir: ir@1f02000 {
clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
clock-names = "apb", "ir";
resets = <&r_ccu RST_APB0_IR>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x01f02000 0x400>;
pinctrl-names = "default";
pinctrl-0 = <&r_cir_pin>;
@@ -1140,14 +1141,16 @@ r_cir: ir@1f02000 {
r_lradc: lradc@1f03c00 {
compatible = "allwinner,sun8i-a83t-r-lradc";
reg = <0x01f03c00 0x100>;
- interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
r_pio: pinctrl@1f02c00 {
compatible = "allwinner,sun8i-a83t-r-pinctrl";
reg = <0x01f02c00 0x400>;
- interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&r_intc>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
<&osc16Md512>;
clock-names = "apb", "hosc", "losc";
All IRQs that can be used to wake up the system must be routed through r_intc, so they are visible to firmware while the system is suspended. For the A83T, r_intc IRQ numbers are offset by 32 from the GIC IRQ numbers. Signed-off-by: Samuel Holland <samuel@sholland.org> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-)