| Message ID | 20200528093115.28268-1-s.trumtrar@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [1/3] ARM: imx7d: add enet2 clk sel | expand |
diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c index ebb27592a9f7..2f9c0151d5be 100644 --- a/arch/arm/mach-imx/mach-imx7d.c +++ b/arch/arm/mach-imx/mach-imx7d.c @@ -65,6 +65,9 @@ static void __init imx7d_enet_clk_sel(void) if (!IS_ERR(gpr)) { regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_TX_CLK_SEL_MASK, 0); regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET_CLK_DIR_MASK, 0); + regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK, 0); + regmap_update_bits(gpr, IOMUXC_GPR1, IMX7D_GPR1_ENET2_CLK_DIR_MASK, + IMX7D_GPR1_ENET2_CLK_DIR_MASK); } else { pr_err("failed to find fsl,imx7d-iomux-gpr regmap\n"); }
Add clock source init for the second ethernet port. This changes the clock direction and clock selection in a way that the ethernet phy reference clock is routed as an output. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- I know, that this is not a "good solution", but I don't know how we can handle this in a better way. Open for suggestions. arch/arm/mach-imx/mach-imx7d.c | 3 +++ 1 file changed, 3 insertions(+)