[3/3] arm64: perf: add support for Cortex-A76

Commit Message

Jisheng Zhang June 19, 2020, 10:45 a.m. UTC

The Cortex-A76 uses some implementation defined perf events. Per
Cortex-A76 TRM r4p0, section C2.3 PMU Events (pages C2-386 to C2-394),
we can reuse Cortex-A57's perf events mapping currently.

Signed-off-by: Jisheng Zhang <[e-mail]>
---
 arch/arm64/kernel/perf_event.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Patch

diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index 55e1d75af708..4fb13fbdc2df 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -1127,7 +1127,7 @@  static int armv8_a75_pmu_init(struct arm_pmu *cpu_pmu)
 static int armv8_a76_pmu_init(struct arm_pmu *cpu_pmu)
 {
 	return armv8_pmu_init(cpu_pmu, "armv8_cortex_a76",
-			      armv8_pmuv3_map_event, NULL, NULL);
+			      armv8_a57_map_event, NULL, NULL);
 }
 
 static int armv8_a77_pmu_init(struct arm_pmu *cpu_pmu)