diff mbox series

[v3] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings

Message ID 20200705181754.13284-1-krzk@kernel.org (mailing list archive)
State Mainlined
Commit f91423e9de61de7a7d8b4b712cfe94cbc0effb1b
Headers show
Series [v3] ARM: dts: exynos: Remove DMA controller bus node name to fix dtschema warnings | expand

Commit Message

Krzysztof Kozlowski July 5, 2020, 6:17 p.m. UTC
There is no need to keep DMA controller nodes under AMBA bus node.
Remove the "amba" node to fix dtschema warnings like:

    amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

---

Changes since v2:
1. Keep the alphabetical order in exynos4210-universal_c210.dts, as suggested by Marek

Changes since v1:
1. Remove the bus, as suggested by Marek
---
 arch/arm/boot/dts/exynos3250.dtsi             |  47 +++----
 arch/arm/boot/dts/exynos4.dtsi                |  70 +++++-----
 .../boot/dts/exynos4210-universal_c210.dts    |  28 ++--
 arch/arm/boot/dts/exynos5250.dtsi             |  92 ++++++-------
 arch/arm/boot/dts/exynos5410.dtsi             |  46 +++----
 arch/arm/boot/dts/exynos5420.dtsi             | 130 ++++++++----------
 6 files changed, 187 insertions(+), 226 deletions(-)

Comments

Marek Szyprowski July 6, 2020, 6:08 a.m. UTC | #1
On 05.07.2020 20:17, Krzysztof Kozlowski wrote:
> There is no need to keep DMA controller nodes under AMBA bus node.
> Remove the "amba" node to fix dtschema warnings like:
>
>      amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>

Works fine on all affected SoCs.

Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>

>
> ---
>
> Changes since v2:
> 1. Keep the alphabetical order in exynos4210-universal_c210.dts, as suggested by Marek
>
> Changes since v1:
> 1. Remove the bus, as suggested by Marek
> ---
>   arch/arm/boot/dts/exynos3250.dtsi             |  47 +++----
>   arch/arm/boot/dts/exynos4.dtsi                |  70 +++++-----
>   .../boot/dts/exynos4210-universal_c210.dts    |  28 ++--
>   arch/arm/boot/dts/exynos5250.dtsi             |  92 ++++++-------
>   arch/arm/boot/dts/exynos5410.dtsi             |  46 +++----
>   arch/arm/boot/dts/exynos5420.dtsi             | 130 ++++++++----------
>   6 files changed, 187 insertions(+), 226 deletions(-)
>
 > ...

Best regards
Alim Akhtar July 6, 2020, 3:55 p.m. UTC | #2
Hi Krzysztof

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: 05 July 2020 23:48
> To: Rob Herring <robh+dt@kernel.org>; Kukjin Kim <kgene@kernel.org>;
> Krzysztof Kozlowski <krzk@kernel.org>; devicetree@vger.kernel.org;
linux-arm-
> kernel@lists.infradead.org; linux-samsung-soc@vger.kernel.org; linux-
> kernel@vger.kernel.org
> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>; Sylwester
Nawrocki
> <snawrocki@kernel.org>; Alim Akhtar <alim.akhtar@samsung.com>; Chanwoo
> Choi <cw00.choi@samsung.com>; Pankaj Dubey
> <pankaj.dubey@samsung.com>
> Subject: [PATCH v3] ARM: dts: exynos: Remove DMA controller bus node name
> to fix dtschema warnings
> 
> There is no need to keep DMA controller nodes under AMBA bus node.
> Remove the "amba" node to fix dtschema warnings like:
> 
>     amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-
> 9a-f]+)?$'
> 
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> 
Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>

> ---
> 
> Changes since v2:
> 1. Keep the alphabetical order in exynos4210-universal_c210.dts, as
suggested
> by Marek
> 
> Changes since v1:
> 1. Remove the bus, as suggested by Marek
> ---
>  arch/arm/boot/dts/exynos3250.dtsi             |  47 +++----
>  arch/arm/boot/dts/exynos4.dtsi                |  70 +++++-----
>  .../boot/dts/exynos4210-universal_c210.dts    |  28 ++--
>  arch/arm/boot/dts/exynos5250.dtsi             |  92 ++++++-------
>  arch/arm/boot/dts/exynos5410.dtsi             |  46 +++----
>  arch/arm/boot/dts/exynos5420.dtsi             | 130 ++++++++----------
>  6 files changed, 187 insertions(+), 226 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/exynos3250.dtsi
> b/arch/arm/boot/dts/exynos3250.dtsi
> index 044e5da64a76..d3fb45a56527 100644
> --- a/arch/arm/boot/dts/exynos3250.dtsi
> +++ b/arch/arm/boot/dts/exynos3250.dtsi
> @@ -418,33 +418,26 @@
>  			status = "disabled";
>  		};
> 
> -		amba {
> -			compatible = "simple-bus";
> -			#address-cells = <1>;
> -			#size-cells = <1>;
> -			ranges;
> -
> -			pdma0: pdma@12680000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x12680000 0x1000>;
> -				interrupts = <GIC_SPI 138
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&cmu CLK_PDMA0>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> -
> -			pdma1: pdma@12690000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x12690000 0x1000>;
> -				interrupts = <GIC_SPI 139
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&cmu CLK_PDMA1>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> +		pdma0: pdma@12680000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x12680000 0x1000>;
> +			interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cmu CLK_PDMA0>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
> +		};
> +
> +		pdma1: pdma@12690000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x12690000 0x1000>;
> +			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&cmu CLK_PDMA1>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
>  		};
> 
>  		adc: adc@126c0000 {
> diff --git a/arch/arm/boot/dts/exynos4.dtsi
b/arch/arm/boot/dts/exynos4.dtsi
> index d2779a790ce3..a1e54449f33f 100644
> --- a/arch/arm/boot/dts/exynos4.dtsi
> +++ b/arch/arm/boot/dts/exynos4.dtsi
> @@ -669,45 +669,37 @@
>  			status = "disabled";
>  		};
> 
> -		amba: amba {
> -			#address-cells = <1>;
> -			#size-cells = <1>;
> -			compatible = "simple-bus";
> -			interrupt-parent = <&gic>;
> -			ranges;
> -
> -			pdma0: pdma@12680000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x12680000 0x1000>;
> -				interrupts = <GIC_SPI 35
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_PDMA0>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> -
> -			pdma1: pdma@12690000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x12690000 0x1000>;
> -				interrupts = <GIC_SPI 36
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_PDMA1>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> -
> -			mdma1: mdma@12850000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x12850000 0x1000>;
> -				interrupts = <GIC_SPI 34
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_MDMA>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <1>;
> -			};
> +		pdma0: pdma@12680000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x12680000 0x1000>;
> +			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_PDMA0>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
> +		};
> +
> +		pdma1: pdma@12690000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x12690000 0x1000>;
> +			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_PDMA1>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
> +		};
> +
> +		mdma1: mdma@12850000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x12850000 0x1000>;
> +			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_MDMA>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <1>;
>  		};
> 
>  		fimd: fimd@11c00000 {
> diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> index 02fde1a75ebd..99ce53b120ac 100644
> --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
> +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
> @@ -181,20 +181,6 @@
>  	};
>  };
> 
> -&amba {
> -	mdma0: mdma@12840000 {
> -		compatible = "arm,pl330", "arm,primecell";
> -		reg = <0x12840000 0x1000>;
> -		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> -		clocks = <&clock CLK_MDMA>;
> -		clock-names = "apb_pclk";
> -		#dma-cells = <1>;
> -		#dma-channels = <8>;
> -		#dma-requests = <1>;
> -		power-domains = <&pd_lcd0>;
> -	};
> -};
> -
>  &camera {
>  	status = "okay";
> 
> @@ -616,6 +602,20 @@
>  	/delete-property/dma-names;
>  };
> 
> +&soc {
> +	mdma0: mdma@12840000 {
> +		compatible = "arm,pl330", "arm,primecell";
> +		reg = <0x12840000 0x1000>;
> +		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> +		clocks = <&clock CLK_MDMA>;
> +		clock-names = "apb_pclk";
> +		#dma-cells = <1>;
> +		#dma-channels = <8>;
> +		#dma-requests = <1>;
> +		power-domains = <&pd_lcd0>;
> +	};
> +};
> +
>  &sysram {
>  	smp-sram@0 {
>  		status = "disabled";
> diff --git a/arch/arm/boot/dts/exynos5250.dtsi
> b/arch/arm/boot/dts/exynos5250.dtsi
> index b6135af7ef39..e3dbe4166836 100644
> --- a/arch/arm/boot/dts/exynos5250.dtsi
> +++ b/arch/arm/boot/dts/exynos5250.dtsi
> @@ -679,56 +679,48 @@
>  			samsung,pmureg-phandle =
> <&pmu_system_controller>;
>  		};
> 
> -		amba {
> -			#address-cells = <1>;
> -			#size-cells = <1>;
> -			compatible = "simple-bus";
> -			interrupt-parent = <&gic>;
> -			ranges;
> -
> -			pdma0: pdma@121a0000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x121A0000 0x1000>;
> -				interrupts = <GIC_SPI 34
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_PDMA0>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> -
> -			pdma1: pdma@121b0000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x121B0000 0x1000>;
> -				interrupts = <GIC_SPI 35
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_PDMA1>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> -
> -			mdma0: mdma@10800000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x10800000 0x1000>;
> -				interrupts = <GIC_SPI 33
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_MDMA0>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <1>;
> -			};
> -
> -			mdma1: mdma@11c10000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x11C10000 0x1000>;
> -				interrupts = <GIC_SPI 124
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_MDMA1>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <1>;
> -			};
> +		pdma0: pdma@121a0000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x121A0000 0x1000>;
> +			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_PDMA0>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
> +		};
> +
> +		pdma1: pdma@121b0000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x121B0000 0x1000>;
> +			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_PDMA1>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
> +		};
> +
> +		mdma0: mdma@10800000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x10800000 0x1000>;
> +			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_MDMA0>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <1>;
> +		};
> +
> +		mdma1: mdma@11c10000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x11C10000 0x1000>;
> +			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_MDMA1>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <1>;
>  		};
> 
>  		gsc_0:  gsc@13e00000 {
> diff --git a/arch/arm/boot/dts/exynos5410.dtsi
> b/arch/arm/boot/dts/exynos5410.dtsi
> index 2eab80bf5f3a..abe75b9e39f5 100644
> --- a/arch/arm/boot/dts/exynos5410.dtsi
> +++ b/arch/arm/boot/dts/exynos5410.dtsi
> @@ -189,34 +189,26 @@
>  			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
>  		};
> 
> -		amba {
> -			#address-cells = <1>;
> -			#size-cells = <1>;
> -			compatible = "simple-bus";
> -			interrupt-parent = <&gic>;
> -			ranges;
> -
> -			pdma0: pdma@121a0000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x121a0000 0x1000>;
> -				interrupts = <GIC_SPI 34
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_PDMA0>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> +		pdma0: pdma@121a0000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x121a0000 0x1000>;
> +			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_PDMA0>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
> +		};
> 
> -			pdma1: pdma@121b0000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x121b0000 0x1000>;
> -				interrupts = <GIC_SPI 35
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_PDMA1>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> +		pdma1: pdma@121b0000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x121b0000 0x1000>;
> +			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_PDMA1>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
>  		};
> 
>  		audi2s0: i2s@3830000 {
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi
> b/arch/arm/boot/dts/exynos5420.dtsi
> index b672080e7469..c76460b70532 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -433,76 +433,68 @@
>  			power-domains = <&mau_pd>;
>  		};
> 
> -		amba {
> -			#address-cells = <1>;
> -			#size-cells = <1>;
> -			compatible = "simple-bus";
> -			interrupt-parent = <&gic>;
> -			ranges;
> -
> -			adma: adma@3880000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x03880000 0x1000>;
> -				interrupts = <GIC_SPI 110
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock_audss EXYNOS_ADMA>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <6>;
> -				#dma-requests = <16>;
> -				power-domains = <&mau_pd>;
> -			};
> -
> -			pdma0: pdma@121a0000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x121A0000 0x1000>;
> -				interrupts = <GIC_SPI 34
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_PDMA0>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> -
> -			pdma1: pdma@121b0000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x121B0000 0x1000>;
> -				interrupts = <GIC_SPI 35
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_PDMA1>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <32>;
> -			};
> -
> -			mdma0: mdma@10800000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x10800000 0x1000>;
> -				interrupts = <GIC_SPI 33
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_MDMA0>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <1>;
> -			};
> +		adma: adma@3880000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x03880000 0x1000>;
> +			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock_audss EXYNOS_ADMA>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <6>;
> +			#dma-requests = <16>;
> +			power-domains = <&mau_pd>;
> +		};
> 
> -			mdma1: mdma@11c10000 {
> -				compatible = "arm,pl330", "arm,primecell";
> -				reg = <0x11C10000 0x1000>;
> -				interrupts = <GIC_SPI 124
> IRQ_TYPE_LEVEL_HIGH>;
> -				clocks = <&clock CLK_MDMA1>;
> -				clock-names = "apb_pclk";
> -				#dma-cells = <1>;
> -				#dma-channels = <8>;
> -				#dma-requests = <1>;
> -				/*
> -				 * MDMA1 can support both secure and non-
> secure
> -				 * AXI transactions. When this is enabled in
> -				 * the kernel for boards that run in secure
> -				 * mode, we are getting imprecise external
> -				 * aborts causing the kernel to oops.
> -				 */
> -				status = "disabled";
> -			};
> +		pdma0: pdma@121a0000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x121A0000 0x1000>;
> +			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_PDMA0>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
> +		};
> +
> +		pdma1: pdma@121b0000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x121B0000 0x1000>;
> +			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_PDMA1>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <32>;
> +		};
> +
> +		mdma0: mdma@10800000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x10800000 0x1000>;
> +			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_MDMA0>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <1>;
> +		};
> +
> +		mdma1: mdma@11c10000 {
> +			compatible = "arm,pl330", "arm,primecell";
> +			reg = <0x11C10000 0x1000>;
> +			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&clock CLK_MDMA1>;
> +			clock-names = "apb_pclk";
> +			#dma-cells = <1>;
> +			#dma-channels = <8>;
> +			#dma-requests = <1>;
> +			/*
> +			 * MDMA1 can support both secure and non-secure
> +			 * AXI transactions. When this is enabled in
> +			 * the kernel for boards that run in secure
> +			 * mode, we are getting imprecise external
> +			 * aborts causing the kernel to oops.
> +			 */
> +			status = "disabled";
>  		};
> 
>  		i2s0: i2s@3830000 {
> --
> 2.17.1
Krzysztof Kozlowski July 7, 2020, 6:49 a.m. UTC | #3
On Sun, Jul 05, 2020 at 08:17:54PM +0200, Krzysztof Kozlowski wrote:
> There is no need to keep DMA controller nodes under AMBA bus node.
> Remove the "amba" node to fix dtschema warnings like:
> 
>     amba: $nodename:0: 'amba' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
> 
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> 
> ---
> 
> Changes since v2:
> 1. Keep the alphabetical order in exynos4210-universal_c210.dts, as suggested by Marek
> 
> Changes since v1:
> 1. Remove the bus, as suggested by Marek
> ---
>  arch/arm/boot/dts/exynos3250.dtsi             |  47 +++----
>  arch/arm/boot/dts/exynos4.dtsi                |  70 +++++-----
>  .../boot/dts/exynos4210-universal_c210.dts    |  28 ++--
>  arch/arm/boot/dts/exynos5250.dtsi             |  92 ++++++-------
>  arch/arm/boot/dts/exynos5410.dtsi             |  46 +++----
>  arch/arm/boot/dts/exynos5420.dtsi             | 130 ++++++++----------

Thanks for testing and reviews. Applied.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 044e5da64a76..d3fb45a56527 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -418,33 +418,26 @@ 
 			status = "disabled";
 		};
 
-		amba {
-			compatible = "simple-bus";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			ranges;
-
-			pdma0: pdma@12680000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x12680000 0x1000>;
-				interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&cmu CLK_PDMA0>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
-
-			pdma1: pdma@12690000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x12690000 0x1000>;
-				interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&cmu CLK_PDMA1>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
+		pdma0: pdma@12680000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x12680000 0x1000>;
+			interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_PDMA0>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		pdma1: pdma@12690000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x12690000 0x1000>;
+			interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cmu CLK_PDMA1>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
 		};
 
 		adc: adc@126c0000 {
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index d2779a790ce3..a1e54449f33f 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -669,45 +669,37 @@ 
 			status = "disabled";
 		};
 
-		amba: amba {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "simple-bus";
-			interrupt-parent = <&gic>;
-			ranges;
-
-			pdma0: pdma@12680000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x12680000 0x1000>;
-				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_PDMA0>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
-
-			pdma1: pdma@12690000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x12690000 0x1000>;
-				interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_PDMA1>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
-
-			mdma1: mdma@12850000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x12850000 0x1000>;
-				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_MDMA>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <1>;
-			};
+		pdma0: pdma@12680000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x12680000 0x1000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_PDMA0>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		pdma1: pdma@12690000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x12690000 0x1000>;
+			interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_PDMA1>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		mdma1: mdma@12850000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x12850000 0x1000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_MDMA>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
 		};
 
 		fimd: fimd@11c00000 {
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index 02fde1a75ebd..99ce53b120ac 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -181,20 +181,6 @@ 
 	};
 };
 
-&amba {
-	mdma0: mdma@12840000 {
-		compatible = "arm,pl330", "arm,primecell";
-		reg = <0x12840000 0x1000>;
-		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-		clocks = <&clock CLK_MDMA>;
-		clock-names = "apb_pclk";
-		#dma-cells = <1>;
-		#dma-channels = <8>;
-		#dma-requests = <1>;
-		power-domains = <&pd_lcd0>;
-	};
-};
-
 &camera {
 	status = "okay";
 
@@ -616,6 +602,20 @@ 
 	/delete-property/dma-names;
 };
 
+&soc {
+	mdma0: mdma@12840000 {
+		compatible = "arm,pl330", "arm,primecell";
+		reg = <0x12840000 0x1000>;
+		interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clock CLK_MDMA>;
+		clock-names = "apb_pclk";
+		#dma-cells = <1>;
+		#dma-channels = <8>;
+		#dma-requests = <1>;
+		power-domains = <&pd_lcd0>;
+	};
+};
+
 &sysram {
 	smp-sram@0 {
 		status = "disabled";
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index b6135af7ef39..e3dbe4166836 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -679,56 +679,48 @@ 
 			samsung,pmureg-phandle = <&pmu_system_controller>;
 		};
 
-		amba {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "simple-bus";
-			interrupt-parent = <&gic>;
-			ranges;
-
-			pdma0: pdma@121a0000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x121A0000 0x1000>;
-				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_PDMA0>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
-
-			pdma1: pdma@121b0000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x121B0000 0x1000>;
-				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_PDMA1>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
-
-			mdma0: mdma@10800000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x10800000 0x1000>;
-				interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_MDMA0>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <1>;
-			};
-
-			mdma1: mdma@11c10000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x11C10000 0x1000>;
-				interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_MDMA1>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <1>;
-			};
+		pdma0: pdma@121a0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121A0000 0x1000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_PDMA0>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		pdma1: pdma@121b0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121B0000 0x1000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_PDMA1>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		mdma0: mdma@10800000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x10800000 0x1000>;
+			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_MDMA0>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
+		};
+
+		mdma1: mdma@11c10000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x11C10000 0x1000>;
+			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_MDMA1>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
 		};
 
 		gsc_0:  gsc@13e00000 {
diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi
index 2eab80bf5f3a..abe75b9e39f5 100644
--- a/arch/arm/boot/dts/exynos5410.dtsi
+++ b/arch/arm/boot/dts/exynos5410.dtsi
@@ -189,34 +189,26 @@ 
 			interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 		};
 
-		amba {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "simple-bus";
-			interrupt-parent = <&gic>;
-			ranges;
-
-			pdma0: pdma@121a0000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x121a0000 0x1000>;
-				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_PDMA0>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
+		pdma0: pdma@121a0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121a0000 0x1000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_PDMA0>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
 
-			pdma1: pdma@121b0000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x121b0000 0x1000>;
-				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_PDMA1>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
+		pdma1: pdma@121b0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121b0000 0x1000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_PDMA1>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
 		};
 
 		audi2s0: i2s@3830000 {
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b672080e7469..c76460b70532 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -433,76 +433,68 @@ 
 			power-domains = <&mau_pd>;
 		};
 
-		amba {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "simple-bus";
-			interrupt-parent = <&gic>;
-			ranges;
-
-			adma: adma@3880000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x03880000 0x1000>;
-				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock_audss EXYNOS_ADMA>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <6>;
-				#dma-requests = <16>;
-				power-domains = <&mau_pd>;
-			};
-
-			pdma0: pdma@121a0000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x121A0000 0x1000>;
-				interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_PDMA0>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
-
-			pdma1: pdma@121b0000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x121B0000 0x1000>;
-				interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_PDMA1>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <32>;
-			};
-
-			mdma0: mdma@10800000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x10800000 0x1000>;
-				interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_MDMA0>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <1>;
-			};
+		adma: adma@3880000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x03880000 0x1000>;
+			interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock_audss EXYNOS_ADMA>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <6>;
+			#dma-requests = <16>;
+			power-domains = <&mau_pd>;
+		};
 
-			mdma1: mdma@11c10000 {
-				compatible = "arm,pl330", "arm,primecell";
-				reg = <0x11C10000 0x1000>;
-				interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
-				clocks = <&clock CLK_MDMA1>;
-				clock-names = "apb_pclk";
-				#dma-cells = <1>;
-				#dma-channels = <8>;
-				#dma-requests = <1>;
-				/*
-				 * MDMA1 can support both secure and non-secure
-				 * AXI transactions. When this is enabled in
-				 * the kernel for boards that run in secure
-				 * mode, we are getting imprecise external
-				 * aborts causing the kernel to oops.
-				 */
-				status = "disabled";
-			};
+		pdma0: pdma@121a0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121A0000 0x1000>;
+			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_PDMA0>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		pdma1: pdma@121b0000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x121B0000 0x1000>;
+			interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_PDMA1>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <32>;
+		};
+
+		mdma0: mdma@10800000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x10800000 0x1000>;
+			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_MDMA0>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
+		};
+
+		mdma1: mdma@11c10000 {
+			compatible = "arm,pl330", "arm,primecell";
+			reg = <0x11C10000 0x1000>;
+			interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clock CLK_MDMA1>;
+			clock-names = "apb_pclk";
+			#dma-cells = <1>;
+			#dma-channels = <8>;
+			#dma-requests = <1>;
+			/*
+			 * MDMA1 can support both secure and non-secure
+			 * AXI transactions. When this is enabled in
+			 * the kernel for boards that run in secure
+			 * mode, we are getting imprecise external
+			 * aborts causing the kernel to oops.
+			 */
+			status = "disabled";
 		};
 
 		i2s0: i2s@3830000 {