| Message ID | 20200713130416.20040-2-festevam@gmail.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | cfe7d1bd1122a3860ac4f3256c6e8fcba3ae9a2f |
| Headers | show |
| Series | [v2,1/2] ARM: dts: imx6qdl-sabresd: Add an mdio node | expand |
On 13.07.20 15:04, Fabio Estevam wrote: > According to the AR8031 datasheet: > > "When using crystal, clock is generated internally after the power is > stable. In order to get reliable power-on-reset, it is recommended to > keep asserting the reset low signal long enough (10 ms) to ensure the > clock is stable and clock-to-reset (1 ms) requirement is satisfied." > > Pass the 'reset-assert-us' property to describe such requirement. > > While at it, use the 'reset-gpios' property inside the the mdio > node instead of the deprecated usage of 'phy-reset-gpios'. > > Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Thanks, Soeren > --- > Changes since v1: > - Use reset-gpios and reset-assert-us inside the mdio node > instead of the deprecated usage of phy-reset-gpios (Soeren) > > arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi > index 6524ad4b0010..5597d45fffda 100644 > --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi > +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi > @@ -204,7 +204,6 @@ > pinctrl-0 = <&pinctrl_enet>; > phy-mode = "rgmii-id"; > phy-handle = <&phy>; > - phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; > fsl,magic-packet; > status = "okay"; > > @@ -215,6 +214,8 @@ > phy: ethernet-phy@1 { > reg = <1>; > qca,clk-out-frequency = <125000000>; > + reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; > + reset-assert-us = <10000>; > }; > }; > };
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi index 6524ad4b0010..5597d45fffda 100644 --- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi @@ -204,7 +204,6 @@ pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii-id"; phy-handle = <&phy>; - phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; fsl,magic-packet; status = "okay"; @@ -215,6 +214,8 @@ phy: ethernet-phy@1 { reg = <1>; qca,clk-out-frequency = <125000000>; + reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + reset-assert-us = <10000>; }; }; };
According to the AR8031 datasheet: "When using crystal, clock is generated internally after the power is stable. In order to get reliable power-on-reset, it is recommended to keep asserting the reset low signal long enough (10 ms) to ensure the clock is stable and clock-to-reset (1 ms) requirement is satisfied." Pass the 'reset-assert-us' property to describe such requirement. While at it, use the 'reset-gpios' property inside the the mdio node instead of the deprecated usage of 'phy-reset-gpios'. Signed-off-by: Fabio Estevam <festevam@gmail.com> --- Changes since v1: - Use reset-gpios and reset-assert-us inside the mdio node instead of the deprecated usage of phy-reset-gpios (Soeren) arch/arm/boot/dts/imx6qdl-sabresd.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)