| Message ID | 20200721071343.2898-1-saiprakash.ranjan@codeaurora.org (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 4a183020d35c6100095605e2c4a47b80f6e301f3 |
| Headers | show |
| Series | arm64: dts: qcom: sdm845: Support ETMv4 power management | expand |
On Tue, Jul 21, 2020 at 12:43:43PM +0530, Sai Prakash Ranjan wrote: > Add "arm,coresight-loses-context-with-cpu" property to coresight > ETM nodes to avoid failure of trace session because of losing > context on entering deep idle states. > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> > > diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi > index e506793407d8..0b5f063dcaea 100644 > --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi > +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi > @@ -3016,6 +3016,7 @@ etm@7040000 { > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -3035,6 +3036,7 @@ etm@7140000 { > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -3054,6 +3056,7 @@ etm@7240000 { > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -3073,6 +3076,7 @@ etm@7340000 { > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -3092,6 +3096,7 @@ etm@7440000 { > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -3111,6 +3116,7 @@ etm@7540000 { > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -3130,6 +3136,7 @@ etm@7640000 { > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > @@ -3149,6 +3156,7 @@ etm@7740000 { > > clocks = <&aoss_qmp>; > clock-names = "apb_pclk"; > + arm,coresight-loses-context-with-cpu; > > out-ports { > port { > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation >
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index e506793407d8..0b5f063dcaea 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -3016,6 +3016,7 @@ etm@7040000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3035,6 +3036,7 @@ etm@7140000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3054,6 +3056,7 @@ etm@7240000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3073,6 +3076,7 @@ etm@7340000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3092,6 +3096,7 @@ etm@7440000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3111,6 +3116,7 @@ etm@7540000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3130,6 +3136,7 @@ etm@7640000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port { @@ -3149,6 +3156,7 @@ etm@7740000 { clocks = <&aoss_qmp>; clock-names = "apb_pclk"; + arm,coresight-loses-context-with-cpu; out-ports { port {
Add "arm,coresight-loses-context-with-cpu" property to coresight ETM nodes to avoid failure of trace session because of losing context on entering deep idle states. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)