From patchwork Thu Jul 23 08:46:25 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lokesh Vutla X-Patchwork-Id: 11680439 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id E5B9A138C for ; Thu, 23 Jul 2020 08:48:07 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id BE8742080D for ; Thu, 23 Jul 2020 08:48:07 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="e667KSIH"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=ti.com header.i=@ti.com header.b="F6Qe5q8o" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org BE8742080D Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=ti.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=1kjYKGaSTlq9AA+yna4Y0L+erERR+anTnHAZqioYUA4=; b=e667KSIHZ1RaN1JTNkQKiYA5K kBgRh7TxfpFCVm5pHsQB1KfWXh2TGQJmnV4wyBgD4w6trfSoOk1yMFmy//yxSPqXP3+gxRpKB01vZ Bs+GYaCZWsdGfeND7VVonvFsA0nu7c72HpFEPhXW7AjYt7nYRDbDXAB/GX3KdcBCSywyaSDC586dj rfdlh6vrvuRGlZyrvG59F/wrRT9nGdsnC01h0i6yXvdqbrRewp7bvYHYXQ5AYF+/SR18qO5NUB1py 4BsPvLoADQc+FJW4mI3NXYFgcg11V6YIRklPvG/Kt1hTg3hy153DmU2XHKNo0Am/mYm2YCeFTc1uo Csk0J40Pw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jyWsK-0006IN-2W; Thu, 23 Jul 2020 08:46:48 +0000 Received: from fllv0015.ext.ti.com ([198.47.19.141]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jyWsB-0006Ff-6r for linux-arm-kernel@lists.infradead.org; Thu, 23 Jul 2020 08:46:40 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 06N8kbPx010598; Thu, 23 Jul 2020 03:46:37 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1595493997; bh=DuJZ/2z+67morWWGSFK35kna9LWJPlZ8DPkMvPDT4S8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=F6Qe5q8owszr4+90djTbk/kUCrNihklgerUGiSR9I4arb4mEO5ODaf3HZirzqZxg2 OYw9DDi8SDjingni/AMugGDc/B3To08mGxaD2dkojvkCDYaHyqFKbAn7Kt7a3ssO8L nKrN+xd21IJk/JuCg2NxTPufajgxdbina2EKV40U= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06N8kbxf083903; Thu, 23 Jul 2020 03:46:37 -0500 Received: from DFLE109.ent.ti.com (10.64.6.30) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 23 Jul 2020 03:46:36 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 23 Jul 2020 03:46:36 -0500 Received: from lokesh-ssd.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 06N8kTEL123087; Thu, 23 Jul 2020 03:46:33 -0500 From: Lokesh Vutla To: Tero Kristo , Nishanth Menon , Rob Herring Subject: [PATCH 1/4] dt-bindings: arm: ti: Add bindings for J7200 SoC Date: Thu, 23 Jul 2020 14:16:25 +0530 Message-ID: <20200723084628.19241-2-lokeshvutla@ti.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200723084628.19241-1-lokeshvutla@ti.com> References: <20200723084628.19241-1-lokeshvutla@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200723_044639_339729_E79C5023 X-CRM114-Status: UNSURE ( 8.59 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [198.47.19.141 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Grygorii Strashko , Lokesh Vutla , Sekhar Nori , linux-kernel@vger.kernel.org, Kishon Vijay Abraham I , Linux ARM Mailing List Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org The J7200 SoC is a part of the K3 Multicore SoC architecture platform. It is targeted for automotive gateway, vehicle compute systems, Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications. The SoC aims to meet the complex processing needs of modern embedded products. Some highlights of this SoC are: * Dual Cortex-A72s in a single cluster, two clusters of lockstep capable dual Cortex-R5F MCUs and a Centralized Device Management and Security Controller (DMSC). * Configurable L3 Cache and IO-coherent architecture with high data throughput capable distributed DMA architecture under NAVSS. * Integrated Ethernet switch supporting up to a total of 4 external ports in addition to legacy Ethernet switch of up to 2 ports. * Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems, 20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and I2C, eCAP/eQEP, eHRPWM among other peripherals. * One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL management. See J7200 Technical Reference Manual (SPRUIU1, June 2020) for further details: https://www.ti.com/lit/pdf/spruiu1 Signed-off-by: Lokesh Vutla --- Documentation/devicetree/bindings/arm/ti/k3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt index 333e7256126a..33419cce0afa 100644 --- a/Documentation/devicetree/bindings/arm/ti/k3.txt +++ b/Documentation/devicetree/bindings/arm/ti/k3.txt @@ -16,6 +16,9 @@ architecture it uses, using one of the following compatible values: - J721E compatible = "ti,j721e"; +- J7200 + compatible = "ti,j7200"; + Boards ------