From patchwork Fri Jul 24 09:16:05 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Li X-Patchwork-Id: 11682807 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 79F87912 for ; Fri, 24 Jul 2020 09:20:13 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 4BF1720674 for ; Fri, 24 Jul 2020 09:20:13 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="3MiooRlY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 4BF1720674 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=eFJDFseRDQJV3bR7yCwmW+balNRs3XC/r53YTXwlHGQ=; b=3MiooRlY3KvwqrfrBgvnddPGx hX1CUibJhDIdxh1H14CGWebIkj+/x06SBlP1FnPw5qUUsJrJiA9EA7Q0Zjlj5dtyq4uooBzSA10vu tYYEYoAwnr0k6MTuZRQW/74/b6TIm9VdNPGyJRh7vvqqIjMjBGnicDzNO+4LE3kHtgRW6mMdZ++v6 +PaE3NRG8VC+E6H23MZ7uE//Cv+2NggR2lR1UPy+RDqdWWoowo+uTnTSnevZ5Bkz39YBGbYsk/vU/ EdC5fDXUY+sjYWyCFfSrP1nQBvrUBFgghiRkbCFgu/liUcoAQ1m0tn/YPRuQdFroPYv8JLTC+bn4z TOEAB183g==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jytqd-0000P2-Os; Fri, 24 Jul 2020 09:18:36 +0000 Received: from szxga06-in.huawei.com ([45.249.212.32] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jytq8-00006c-Nu for linux-arm-kernel@lists.infradead.org; Fri, 24 Jul 2020 09:18:08 +0000 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id DAB427DECD0A04FB1572; Fri, 24 Jul 2020 17:18:02 +0800 (CST) Received: from euler.huawei.com (10.175.124.27) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.487.0; Fri, 24 Jul 2020 17:17:53 +0800 From: Wei Li To: Adrian Hunter , Alexander Shishkin , Arnaldo Carvalho de Melo , Catalin Marinas , James Clark , Jiri Olsa , Leo Yan , Mark Rutland , Namhyung Kim , Suzuki K Poulose , Will Deacon , Subject: [PATCH 2/4] perf: arm-spe: Add support for ARMv8.3-SPE Date: Fri, 24 Jul 2020 17:16:05 +0800 Message-ID: <20200724091607.41903-3-liwei391@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200724091607.41903-1-liwei391@huawei.com> References: <20200724091607.41903-1-liwei391@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.124.27] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200724_051805_644370_19A064D5 X-CRM114-Status: GOOD ( 12.16 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [45.249.212.32 listed in wl.mailspike.net] -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.32 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Zijlstra , Ingo Molnar , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, guohanjun@huawei.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Armv8.3 extends the SPE by adding: - Alignment field in the Events packet, and filtering on this event using PMSEVFR_EL1. - Support for the Scalable Vector Extension (SVE). The main additions for SVE are: - Recording the vector length for SVE operations in the Operation Type packet. It is not possible to filter on vector length. - Incomplete predicate and empty predicate fields in the Events packet, and filtering on these events using PMSEVFR_EL1. Add the corresponding decode process of Events packet and Operation Type packet in perf tool. Signed-off-by: Wei Li --- .../arm-spe-decoder/arm-spe-pkt-decoder.c | 69 ++++++++++++++++++- 1 file changed, 67 insertions(+), 2 deletions(-) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c index b94001b756c7..10a3692839de 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-pkt-decoder.c @@ -347,6 +347,24 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, blen -= ret; } } + if (idx > 2) { + if (payload & 0x800) { + ret = snprintf(buf, buf_len, " ALIGNMENT"); + buf += ret; + blen -= ret; + } + if (payload & 0x20000) { + ret = snprintf(buf, buf_len, " SVE-PRED-PARTIAL"); + buf += ret; + blen -= ret; + } + if (payload & 0x40000) { + ret = snprintf(buf, buf_len, " SVE-PRED-EMPTY"); + buf += ret; + blen -= ret; + } + } + if (ret < 0) return ret; blen -= ret; @@ -354,8 +372,38 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, } case ARM_SPE_OP_TYPE: switch (idx) { - case 0: return snprintf(buf, buf_len, "%s", payload & 0x1 ? - "COND-SELECT" : "INSN-OTHER"); + case 0: { + if (payload & 0x8) { + size_t blen = buf_len; + + ret = snprintf(buf, buf_len, "SVE-OTHER"); + buf += ret; + blen -= ret; + if (payload & 0x2) { + ret = snprintf(buf, buf_len, " FP"); + buf += ret; + blen -= ret; + } + if (payload & 0x4) { + ret = snprintf(buf, buf_len, " PRED"); + buf += ret; + blen -= ret; + } + if (payload & 0x70) { + ret = snprintf(buf, buf_len, " EVL %d", + 32 << ((payload & 0x70) >> 4)); + buf += ret; + blen -= ret; + } + if (ret < 0) + return ret; + blen -= ret; + return buf_len - blen; + } else { + return snprintf(buf, buf_len, "%s", payload & 0x1 ? + "COND-SELECT" : "INSN-OTHER"); + } + } case 1: { size_t blen = buf_len; @@ -385,6 +433,23 @@ int arm_spe_pkt_desc(const struct arm_spe_pkt *packet, char *buf, ret = snprintf(buf, buf_len, " SIMD-FP"); buf += ret; blen -= ret; + } else if (payload & 0x8) { + if (payload & 0x4) { + ret = snprintf(buf, buf_len, " PRED"); + buf += ret; + blen -= ret; + } + if (payload & 0x70) { + ret = snprintf(buf, buf_len, " EVL %d", + 32 << ((payload & 0x70) >> 4)); + buf += ret; + blen -= ret; + } + if (payload & 0x80) { + ret = snprintf(buf, buf_len, " SG"); + buf += ret; + blen -= ret; + } } if (ret < 0) return ret;