From patchwork Fri Jul 24 09:16:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Li X-Patchwork-Id: 11682805 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 37DFA912 for ; Fri, 24 Jul 2020 09:20:09 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 03F7A2063A for ; Fri, 24 Jul 2020 09:20:09 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="kbPGhrcR" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 03F7A2063A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=VbO/IjT/tokLF2Eo1VOPFbeyRnLzd3/5nMqWoFcdc/o=; b=kbPGhrcRYoeLsh78l3mkg/wTt lO+ZAmMlE7CLic6hFBmblOr6cYtGDnwvTGUibCZC2xDRKmrcWjsMpTyR82c3xbImoHuv2OYDoRmm6 biL00EvB+hRe9Yel8DiGsy0G7mZ5yloyKZM6WbElF1LrpEuoXmv/XbP2NueP+sRDFtcppX5V0Cb8Y Z1sKaGWLaM/CbnoemvqjR0fQ7But/CUXnJWDfmvvpqIB72rsB9HMS+VtipHBqI+vncZ+tkr49nraD fI6UdIBNQckBiqHcX6J/6p8pV8yMq6cMxo/U6nW6g8vPEZjEBQVNJnTS6a3srUqH0NR+biJbKJBhD wTk/suEPw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jytqW-0000MF-MG; Fri, 24 Jul 2020 09:18:28 +0000 Received: from szxga06-in.huawei.com ([45.249.212.32] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jytq9-00006g-09 for linux-arm-kernel@lists.infradead.org; Fri, 24 Jul 2020 09:18:08 +0000 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 030DEC63573694F39600; Fri, 24 Jul 2020 17:18:03 +0800 (CST) Received: from euler.huawei.com (10.175.124.27) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.487.0; Fri, 24 Jul 2020 17:17:53 +0800 From: Wei Li To: Adrian Hunter , Alexander Shishkin , Arnaldo Carvalho de Melo , Catalin Marinas , James Clark , Jiri Olsa , Leo Yan , Mark Rutland , Namhyung Kim , Suzuki K Poulose , Will Deacon , Subject: [PATCH 3/4] perf auxtrace: Add new itrace options for ARMv8.3-SPE Date: Fri, 24 Jul 2020 17:16:06 +0800 Message-ID: <20200724091607.41903-4-liwei391@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200724091607.41903-1-liwei391@huawei.com> References: <20200724091607.41903-1-liwei391@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.124.27] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200724_051805_377126_2AEED6DA X-CRM114-Status: GOOD ( 10.68 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [45.249.212.32 listed in wl.mailspike.net] -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.32 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Zijlstra , Ingo Molnar , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, guohanjun@huawei.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This patch is to add two options to synthesize events which are described as below: 'u': synthesize unaligned address access events 'v': synthesize partial/empty predicated SVE events This two options will be used by ARM SPE as their first consumer. Signed-off-by: Wei Li Reviewed-by: Leo Yan --- tools/perf/Documentation/itrace.txt | 2 ++ tools/perf/util/auxtrace.c | 8 ++++++++ tools/perf/util/auxtrace.h | 4 ++++ 3 files changed, 14 insertions(+) diff --git a/tools/perf/Documentation/itrace.txt b/tools/perf/Documentation/itrace.txt index e817179c5027..25bcf3622709 100644 --- a/tools/perf/Documentation/itrace.txt +++ b/tools/perf/Documentation/itrace.txt @@ -13,6 +13,8 @@ m synthesize last level cache events t synthesize TLB events a synthesize remote access events + u synthesize unaligned address access events + v synthesize partial/empty predicated SVE events g synthesize a call chain (use with i or x) G synthesize a call chain on existing event records l synthesize last branch entries (use with i or x) diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c index 25c639ac4ad4..2033eb3708ec 100644 --- a/tools/perf/util/auxtrace.c +++ b/tools/perf/util/auxtrace.c @@ -1334,6 +1334,8 @@ void itrace_synth_opts__set_default(struct itrace_synth_opts *synth_opts, synth_opts->llc = true; synth_opts->tlb = true; synth_opts->remote_access = true; + synth_opts->alignment = true; + synth_opts->sve = true; if (no_sample) { synth_opts->period_type = PERF_ITRACE_PERIOD_INSTRUCTIONS; @@ -1507,6 +1509,12 @@ int itrace_parse_synth_opts(const struct option *opt, const char *str, case 'a': synth_opts->remote_access = true; break; + case 'u': + synth_opts->alignment = true; + break; + case 'v': + synth_opts->sve = true; + break; case ' ': case ',': break; diff --git a/tools/perf/util/auxtrace.h b/tools/perf/util/auxtrace.h index 142ccf7d34df..972df7b06b0d 100644 --- a/tools/perf/util/auxtrace.h +++ b/tools/perf/util/auxtrace.h @@ -116,6 +116,8 @@ struct itrace_synth_opts { bool llc; bool tlb; bool remote_access; + bool alignment; + bool sve; unsigned int callchain_sz; unsigned int last_branch_sz; unsigned long long period; @@ -617,6 +619,8 @@ bool auxtrace__evsel_is_auxtrace(struct perf_session *session, " m: synthesize last level cache events\n" \ " t: synthesize TLB events\n" \ " a: synthesize remote access events\n" \ +" u: synthesize unaligned address access events\n" \ +" v: synthesize partial/empty predicated SVE events\n" \ " g[len]: synthesize a call chain (use with i or x)\n" \ " l[len]: synthesize last branch entries (use with i or x)\n" \ " sNUMBER: skip initial number of events\n" \