From patchwork Fri Jul 24 09:16:07 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wei Li X-Patchwork-Id: 11682799 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 17909913 for ; Fri, 24 Jul 2020 09:19:45 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C2FE520674 for ; Fri, 24 Jul 2020 09:19:44 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="hv9ZM4X1" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C2FE520674 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=jKsJyXPG3bmPlxgUqfnA2mtJMrWfzU6EUYY1VJ/VJ98=; b=hv9ZM4X1Svrk7F+5XzI28NYO+ iVP0AdqUcPV/IaAxHLtKn4zCLH7MNdLR3kb6Te8p5CM6fLGTEZB+QTAKm5yI4cB0UPWdhW8FQsmoP 6vPxuO+K4sAjgsRkpR6LDSb2nEqfZa/HVDLDD+pSDhY4He9PEf2qOyO19TaYlYxDizcGJDzSTlDDz wpuln6EeTE3aL1Y7mxmMbgenySKQVw1M8fdTzWom3iPNEEl6kVOhWyjaNrS/Cx6wvGpIg9xylr1Q+ d5PycHoT1r01S4sHoxOPAZ05x0iCRrLI2SlzMUlAhiZgisEVPeFtIAWk5jr6PLFm2Ol2Ibzu1RsBI K3gJcQYtQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jytqE-0000AZ-KE; Fri, 24 Jul 2020 09:18:10 +0000 Received: from szxga06-in.huawei.com ([45.249.212.32] helo=huawei.com) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jytq8-00006d-PD for linux-arm-kernel@lists.infradead.org; Fri, 24 Jul 2020 09:18:06 +0000 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id E4A3DE6E6F2762F6A3B8; Fri, 24 Jul 2020 17:18:02 +0800 (CST) Received: from euler.huawei.com (10.175.124.27) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.487.0; Fri, 24 Jul 2020 17:17:54 +0800 From: Wei Li To: Adrian Hunter , Alexander Shishkin , Arnaldo Carvalho de Melo , Catalin Marinas , James Clark , Jiri Olsa , Leo Yan , Mark Rutland , Namhyung Kim , Suzuki K Poulose , Will Deacon , Subject: [PATCH 4/4] perf: arm-spe: Synthesize new events for ARMv8.3-SPE Date: Fri, 24 Jul 2020 17:16:07 +0800 Message-ID: <20200724091607.41903-5-liwei391@huawei.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200724091607.41903-1-liwei391@huawei.com> References: <20200724091607.41903-1-liwei391@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.175.124.27] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200724_051805_114310_811CA766 X-CRM114-Status: GOOD ( 10.57 ) X-Spam-Score: -2.3 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.3 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [45.249.212.32 listed in list.dnswl.org] 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [45.249.212.32 listed in wl.mailspike.net] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Zijlstra , Ingo Molnar , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, guohanjun@huawei.com Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Synthesize unaligned address access events and partial/empty predicated SVE operation introduced by ARMv8.3-SPE. They can be filtered by itrace options when reporting. Signed-off-by: Wei Li --- .../util/arm-spe-decoder/arm-spe-decoder.c | 11 ++++ .../util/arm-spe-decoder/arm-spe-decoder.h | 3 + tools/perf/util/arm-spe.c | 61 +++++++++++++++++++ 3 files changed, 75 insertions(+) diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c index 93e063f22be5..fac8102c0149 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.c @@ -197,6 +197,17 @@ static int arm_spe_read_record(struct arm_spe_decoder *decoder) if (payload & BIT(EV_MISPRED)) decoder->record.type |= ARM_SPE_BRANCH_MISS; + if ((idx == 4 || idx == 8) && + (payload & BIT(EV_ALIGNMENT))) + decoder->record.type |= ARM_SPE_ALIGNMENT; + + if ((idx == 4 || idx == 8) && + (payload & BIT(EV_PARTIAL_PREDICATE))) + decoder->record.type |= ARM_SPE_PARTIAL_PREDICATE; + + if ((idx == 4 || idx == 8) && + (payload & BIT(EV_EMPTY_PREDICATE))) + decoder->record.type |= ARM_SPE_EMPTY_PREDICATE; break; case ARM_SPE_DATA_SOURCE: break; diff --git a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h index a5111a8d4360..d165418fcc13 100644 --- a/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h +++ b/tools/perf/util/arm-spe-decoder/arm-spe-decoder.h @@ -39,6 +39,9 @@ enum arm_spe_sample_type { ARM_SPE_TLB_MISS = 1 << 5, ARM_SPE_BRANCH_MISS = 1 << 6, ARM_SPE_REMOTE_ACCESS = 1 << 7, + ARM_SPE_ALIGNMENT = 1 << 8, + ARM_SPE_PARTIAL_PREDICATE = 1 << 9, + ARM_SPE_EMPTY_PREDICATE = 1 << 10, }; struct arm_spe_record { diff --git a/tools/perf/util/arm-spe.c b/tools/perf/util/arm-spe.c index 3882a5360ada..e36d6eea269b 100644 --- a/tools/perf/util/arm-spe.c +++ b/tools/perf/util/arm-spe.c @@ -53,6 +53,8 @@ struct arm_spe { u8 sample_tlb; u8 sample_branch; u8 sample_remote_access; + u8 sample_alignment; + u8 sample_sve; u64 l1d_miss_id; u64 l1d_access_id; @@ -62,6 +64,9 @@ struct arm_spe { u64 tlb_access_id; u64 branch_miss_id; u64 remote_access_id; + u64 alignment_id; + u64 epred_sve_id; + u64 ppred_sve_id; u64 kernel_start; @@ -344,6 +349,30 @@ static int arm_spe_sample(struct arm_spe_queue *speq) return err; } + if (spe->sample_alignment && + (record->type & ARM_SPE_ALIGNMENT)) { + err = arm_spe_synth_spe_events_sample(speq, + spe->alignment_id); + if (err) + return err; + } + + if (spe->sample_sve) { + if (record->type & ARM_SPE_EMPTY_PREDICATE) { + err = arm_spe_synth_spe_events_sample( + speq, spe->epred_sve_id); + if (err) + return err; + } + + if (record->type & ARM_SPE_PARTIAL_PREDICATE) { + err = arm_spe_synth_spe_events_sample( + speq, spe->ppred_sve_id); + if (err) + return err; + } + } + return 0; } @@ -907,6 +936,38 @@ arm_spe_synth_events(struct arm_spe *spe, struct perf_session *session) id += 1; } + if (spe->synth_opts.alignment) { + spe->sample_alignment = true; + + /* Alignment */ + err = arm_spe_synth_event(session, &attr, id); + if (err) + return err; + spe->alignment_id = id; + arm_spe_set_event_name(evlist, id, "alignment"); + id += 1; + } + + if (spe->synth_opts.sve) { + spe->sample_sve = true; + + /* Empty predicated SVE */ + err = arm_spe_synth_event(session, &attr, id); + if (err) + return err; + spe->epred_sve_id = id; + arm_spe_set_event_name(evlist, id, "sve-pred-empty"); + id += 1; + + /* Partial predicated SVE */ + err = arm_spe_synth_event(session, &attr, id); + if (err) + return err; + spe->ppred_sve_id = id; + arm_spe_set_event_name(evlist, id, "sve-pred-partial"); + id += 1; + } + return 0; }