From patchwork Fri Jul 24 11:14:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lars Povlsen X-Patchwork-Id: 11683071 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A4BEE138A for ; Fri, 24 Jul 2020 11:16:43 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7D2212064B for ; Fri, 24 Jul 2020 11:16:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="Orlkho19"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="cWQNf08n" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7D2212064B Authentication-Results: mail.kernel.org; dmarc=fail (p=quarantine dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-ID:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ljLBTCe2AI8ZYjqbSdB/Ckzd0BB7pRpj3qkXBsm55gY=; b=Orlkho19YW8TsnPPg+Cuuz63H OwO0T6MldTwUgmr4VUb3/4KsoNcH7RmiBCjOPaqjykmhmjBDEOBO/GsPY8Sf007P4ONPef5zeiUxE V/n3aOQoLitHkB1b6HsbO+r0iB6Dij/WPkLuta2ORao+yvNtyCYS818Kcz7DcEoCFfVbTRPZNyJSd z+P7eVuRPdNh3KTZ7y4xe5nw3qd4S44kz2hp2rQ5qLkF4ILMKL16QSMy6OJ0NaIaftSOvSQd3AuWL JYMZrE95w3XFKKNDW0eawLCR0dlPXy4wWK4z1Niufvti1wsPpMTj0/XB+uaLbcd7cC6SU7mU/ZjW5 Gple5H7XA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jyvfS-0001Qb-RK; Fri, 24 Jul 2020 11:15:10 +0000 Received: from esa3.microchip.iphmx.com ([68.232.153.233]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jyvfA-0001Ie-9H for linux-arm-kernel@lists.infradead.org; Fri, 24 Jul 2020 11:14:53 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1595589292; x=1627125292; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=waqXZnk28E7CDrTE7Pdur3L9Lz9pzClbHiza62G0WAM=; b=cWQNf08nJz9o4ke208IdQ5lmbnjwxGWL/sRpfahQ6g0joFY97Zh+GOww 73xf2nVXLPKpJOpLlol1C0iOkLPj+QtAX6raP+41wHRjABoTchNq7DcCQ n1zVvMHpo2klqdWSSizdHUqovmT8AG/pjJrsqso8B5QLXFYzPbJgf9vyQ 2uIOlaNsKMlANSlRXmjcQzkIH33AxRYuqoL+K0rm7vWhhI8SLI3y9EF3Q bW2OgmuYTT0mMKATYclQCK/etvkp8Yj3rrLn0DNqFcmV2WU8IxViaa6bw Wnrsg+fe8oIqtMVqHzQUG7/9724J4/GcNeuH58dXh6uOsJLEP2Qfn32F0 A==; IronPort-SDR: WAbbgNE1hKhldkGByJhpWpklO9SSHN044DLMhy8EFTHX5n2VBtoZ6cgSsGMLOomMNw6//JKEWu Ujy7bRY681V7zVUPMUrCgzymcXVSO//q47THxAThhUnPBR2dPSlZT4KwSfInc7LrVUlAouvLHt uWqvg/dV91yyg0A03xe0IIcMF/UO4B2k5NlkLIZs/WZmpo/0+CDh7sWCWhrjIcva8B404d9FMs sv36Ij11KmAqrgpWRc0PxZZw1WYAMIQfeRV/jN7Nt078rH3IxLUte3vE3Wz+qaMHtno2535Q5X lAQ= X-IronPort-AV: E=Sophos;i="5.75,390,1589266800"; d="scan'208";a="85239387" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 24 Jul 2020 04:14:51 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Fri, 24 Jul 2020 04:14:50 -0700 Received: from soft-dev15.microsemi.net (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Fri, 24 Jul 2020 04:14:08 -0700 From: Lars Povlsen To: Mark Brown , Peter Rosin Subject: [PATCH v4 5/6] arm64: dts: sparx5: Add spi-nor support Date: Fri, 24 Jul 2020 13:14:03 +0200 Message-ID: <20200724111404.13293-6-lars.povlsen@microchip.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200724111404.13293-1-lars.povlsen@microchip.com> References: <20200724111404.13293-1-lars.povlsen@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200724_071452_567317_E97204B6 X-CRM114-Status: UNSURE ( 8.62 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -2.5 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.5 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 RCVD_IN_MSPIKE_H4 RBL: Very Good reputation (+4) [68.232.153.233 listed in wl.mailspike.net] -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [68.232.153.233 listed in list.dnswl.org] -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.0 RCVD_IN_MSPIKE_WL Mailspike good senders X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Serge Semin , linux-spi@vger.kernel.org, Serge Semin , Lars Povlsen , Microchip Linux Driver Support , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This add spi-nor device nodes to the Sparx5 reference boards. Signed-off-by: Lars Povlsen --- arch/arm64/boot/dts/microchip/sparx5_pcb125.dts | 16 ++++++++++++++++ .../boot/dts/microchip/sparx5_pcb134_board.dtsi | 16 ++++++++++++++++ .../boot/dts/microchip/sparx5_pcb135_board.dtsi | 16 ++++++++++++++++ 3 files changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts index 573309fe45823..c1eb1d661174d 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb125.dts @@ -39,6 +39,22 @@ &sdhci0 { microchip,clock-delay = <10>; }; +&spi0 { + status = "okay"; + spi@0 { + compatible = "spi-mux"; + mux-controls = <&mux>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* CS0 */ + spi-flash@9 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <8000000>; + reg = <0x9>; /* SPI */ + }; + }; +}; + &i2c1 { status = "okay"; }; diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi index 18a535a043686..35984785d611c 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb134_board.dtsi @@ -38,6 +38,22 @@ gpio-restart { }; }; +&spi0 { + status = "okay"; + spi@0 { + compatible = "spi-mux"; + mux-controls = <&mux>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* CS0 */ + spi-flash@9 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <8000000>; + reg = <0x9>; /* SPI */ + }; + }; +}; + &gpio { i2cmux_pins_i: i2cmux-pins-i { pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19", diff --git a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi index d71f11a10b3d2..7de66806b14b3 100644 --- a/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi +++ b/arch/arm64/boot/dts/microchip/sparx5_pcb135_board.dtsi @@ -51,6 +51,22 @@ i2cmux_s32: i2cmux-3 { }; }; +&spi0 { + status = "okay"; + spi@0 { + compatible = "spi-mux"; + mux-controls = <&mux>; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; /* CS0 */ + spi-flash@9 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <8000000>; + reg = <0x9>; /* SPI */ + }; + }; +}; + &axi { i2c0_imux: i2c0-imux@0 { compatible = "i2c-mux-pinctrl";