From patchwork Fri Jul 31 08:33:58 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 11694433 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id CA88C722 for ; Fri, 31 Jul 2020 08:36:06 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A252220663 for ; Fri, 31 Jul 2020 08:36:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="H4FvD6ov"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="Uy5npnfk" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A252220663 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=iGxghQ1w6RcDn9S3cH8qGCfrcfEphwDUmUyNHcvL1Pk=; b=H4FvD6ov8Yq8+CyNZGrV+M+HK qN56qo49VYHQpbTOR+T2nSdWaUwxtzLJGYi29xO5VcoQ8R/5D9Ob2Dfok+FShKPeZi9+Qx7xU+6iv bmr14ImWlJVso15h4DfRg60X1JPvAeiqb2oKU6HNfn06BOsx7QudwG6Bu3V5CHHIoMP0qhDtP4rEo Qdti0On3xSe4GyB8DIggNOHINdRse4oatPibfLS8M9t0XJm7zmyUBop4OTovcYre46D/sIFHWm/60 OPYYZ7UOtSX0KYoP7VreSrQ32fz/WT7oKZO4t2c1CMRUOKFnE7i9MrGQruUHrniKeDf+8RwXIxP6S SGZYzDXQw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1k1QUp-0006yJ-GG; Fri, 31 Jul 2020 08:34:31 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1k1QUj-0006wV-IG for linux-arm-kernel@lists.infradead.org; Fri, 31 Jul 2020 08:34:26 +0000 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E16C521883; Fri, 31 Jul 2020 08:34:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1596184465; bh=9Ua3l8Z+o8oDzV6Cm2c7oBO9h6SxkvBiIANJUXpLED4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Uy5npnfkEjgjwgA6j9ZrTQ5N66wr3Fd8BKIzi48XNpj1MFy5sdqUTAGaEgfw0qt6Q XSdqvqU7ChBTavJD0tOzO9nzmC8pOtcUvPhGmPixijCKTY26X+zAwHXuhAdQgjkSlZ M4/5gGwUBlpbHIGXQiGu1gz/FXMW3OIj+MCaEumA= Received: from 78.163-31-62.static.virginmediabusiness.co.uk ([62.31.163.78] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1k1QUh-00GTkD-ER; Fri, 31 Jul 2020 09:34:23 +0100 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/2] arm64: Allow booting of late CPUs affected by erratum 1418040 Date: Fri, 31 Jul 2020 09:33:58 +0100 Message-Id: <20200731083358.50058-3-maz@kernel.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200731083358.50058-1-maz@kernel.org> References: <20200731083358.50058-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, saiprakash.ranjan@codeaurora.org, will@kernel.org, catalin.marinas@arm.com, suzuki.poulose@arm.com, swboyd@chromium.org, dianders@google.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200731_043425_669933_90579A56 X-CRM114-Status: GOOD ( 14.62 ) X-Spam-Score: -5.2 (-----) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-5.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [198.145.29.99 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sai Prakash Ranjan , kernel-team@android.com, Suzuki K Poulose , Catalin Marinas , Stephen Boyd , dianders@google.com, Will Deacon Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org As we can now switch from a system that isn't affected by 1418040 to a system that globally is affected, let's allow affected CPUs to come in at a later time. Reviewed-by: Stephen Boyd Reviewed-by: Suzuki K Poulose Tested-by: Sai Prakash Ranjan Signed-off-by: Marc Zyngier --- arch/arm64/kernel/cpu_errata.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 79728bfb5351..2c0b82db825b 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -910,6 +910,8 @@ const struct arm64_cpu_capabilities arm64_errata[] = { .desc = "ARM erratum 1418040", .capability = ARM64_WORKAROUND_1418040, ERRATA_MIDR_RANGE_LIST(erratum_1418040_list), + .type = (ARM64_CPUCAP_SCOPE_LOCAL_CPU | + ARM64_CPUCAP_PERMITTED_FOR_LATE_CPU), }, #endif #ifdef CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT