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Thu, 03 Sep 2020 16:26:25 +0100 From: Marc Zyngier To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: [PATCH 07/23] KVM: arm64: Add irqchip callback structure to kvm_arch Date: Thu, 3 Sep 2020 16:25:54 +0100 Message-Id: <20200903152610.1078827-8-maz@kernel.org> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200903152610.1078827-1-maz@kernel.org> References: <20200903152610.1078827-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 62.31.163.78 X-SA-Exim-Rcpt-To: kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org, kernel-team@android.com, Christoffer.Dall@arm.com, lorenzo.pieralisi@arm.com, james.morse@arm.com, julien.thierry.kdev@gmail.com, suzuki.poulose@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200903_112627_695408_87B0BF5D X-CRM114-Status: GOOD ( 18.94 ) X-Spam-Score: -5.2 (-----) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-5.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [198.145.29.99 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lorenzo Pieralisi , Suzuki K Poulose , Christoffer Dall , James Morse , kernel-team@android.com, Julien Thierry Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org As we are about to abstract part of the vgic implementation in order to make it more modular, let's start by adding a data structure that will eventually contain interrupt controller specific callbacks, as well as helpers to call them (or gracefully skip them if they aren't implemented. It is empty so far, so no functional changes are anticipated. Signed-off-by: Marc Zyngier --- arch/arm64/include/asm/kvm_host.h | 1 + arch/arm64/include/asm/kvm_irq.h | 29 +++++++++++++++++++++++++++++ arch/arm64/kvm/vgic/vgic-init.c | 5 +++++ 3 files changed, 35 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index f0e30e12b523..52b502f3076f 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -100,6 +100,7 @@ struct kvm_arch { /* Interrupt controller */ enum kvm_irqchip_type irqchip_type; + struct kvm_irqchip_flow irqchip_flow; struct vgic_dist vgic; /* Mandated version of PSCI */ diff --git a/arch/arm64/include/asm/kvm_irq.h b/arch/arm64/include/asm/kvm_irq.h index 46bffb6026f8..7a70bb803560 100644 --- a/arch/arm64/include/asm/kvm_irq.h +++ b/arch/arm64/include/asm/kvm_irq.h @@ -17,4 +17,33 @@ enum kvm_irqchip_type { #define irqchip_is_gic_v2(k) ((k)->arch.irqchip_type == IRQCHIP_GICv2) #define irqchip_is_gic_v3(k) ((k)->arch.irqchip_type == IRQCHIP_GICv3) +struct kvm_irqchip_flow { +}; + +/* + * Macro galore. At the point this is included, the various types are + * not defined yet. Yes, this is terminally ugly. + */ +#define __kvm_irqchip_action(k, x, ...) \ + do { \ + if (likely((k)->arch.irqchip_flow.irqchip_##x)) \ + (k)->arch.irqchip_flow.irqchip_##x(__VA_ARGS__); \ + } while (0) + +#define __kvm_irqchip_action_ret(k, x, ...) \ + ({ \ + typeof ((k)->arch.irqchip_flow.irqchip_##x(__VA_ARGS__)) ret; \ + ret = (likely((k)->arch.irqchip_flow.irqchip_##x) ? \ + (k)->arch.irqchip_flow.irqchip_##x(__VA_ARGS__) : \ + 0); \ + \ + ret; \ + }) + +#define __vcpu_irqchip_action(v, ...) \ + __kvm_irqchip_action((v)->kvm, __VA_ARGS__) + +#define __vcpu_irqchip_action_ret(v, ...) \ + __kvm_irqchip_action_ret((v)->kvm, __VA_ARGS__) + #endif diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c index 76cce0db63a7..6b8f0518c074 100644 --- a/arch/arm64/kvm/vgic/vgic-init.c +++ b/arch/arm64/kvm/vgic/vgic-init.c @@ -12,6 +12,9 @@ #include #include "vgic.h" +static struct kvm_irqchip_flow vgic_irqchip_flow = { +}; + /* * Initialization rules: there are multiple stages to the vgic * initialization, both for the distributor and the CPU interfaces. The basic @@ -98,6 +101,8 @@ int kvm_vgic_create(struct kvm *kvm, u32 type) else INIT_LIST_HEAD(&kvm->arch.vgic.rd_regions); + kvm->arch.irqchip_flow = vgic_irqchip_flow; + INIT_LIST_HEAD(&dist->lpi_list_head); INIT_LIST_HEAD(&dist->lpi_translation_cache); raw_spin_lock_init(&dist->lpi_list_lock);