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[1/3] RFC: ARM: head: Use non-conditional instructions

Message ID 20200904081949.5594-2-linus.walleij@linaro.org
State New, archived
Headers show
Series RFC: ARM section mapping debug prints | expand

Commit Message

Linus Walleij Sept. 4, 2020, 8:19 a.m. UTC
Debugging the code mapping the two sections covering the
parameter passed in r2 becomes really complicated as it
is using conditional "*ne" suffixed instructions: inserting
debug prints will invariably affect the zero flag making
this code hard to debug without hardware debuggers.

Simplify the code by using a simple beq to skip over the
mapping as is the intention in this code, and rely on
standard add/sub etc.

After this is is easier to insert debug prints in the code.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
 arch/arm/kernel/head.S | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)
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diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
index f8904227e7fd..2bfdf33aa74c 100644
--- a/arch/arm/kernel/head.S
+++ b/arch/arm/kernel/head.S
@@ -275,13 +275,15 @@  __create_page_tables:
 	mov	r0, r2, lsr #SECTION_SHIFT
 	movs	r0, r0, lsl #SECTION_SHIFT
-	subne	r3, r0, r8
-	addne	r3, r3, #PAGE_OFFSET
-	addne	r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
-	orrne	r6, r7, r0
-	strne	r6, [r3], #1 << PMD_ORDER
-	addne	r6, r6, #1 << SECTION_SHIFT
-	strne	r6, [r3]
+	beq	1f /* r2 was zero (no ATAGs or DTB) */
+	sub	r3, r0, r8
+	add	r3, r3, #PAGE_OFFSET
+	add	r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
+	orr	r6, r7, r0
+	str	r6, [r3], #1 << PMD_ORDER
+	add	r6, r6, #1 << SECTION_SHIFT
+	str	r6, [r3]
 #if defined(CONFIG_ARM_LPAE) && defined(CONFIG_CPU_ENDIAN_BE8)
 	sub	r4, r4, #4			@ Fixup page table pointer