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Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kED76-0008V6-I5; Fri, 04 Sep 2020 14:54:52 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kED6U-00088i-II for linux-arm-kernel@lists.infradead.org; Fri, 04 Sep 2020 14:54:15 +0000 Received: from kozik-lap.mshome.net (unknown [194.230.155.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 00E3520770; Fri, 4 Sep 2020 14:54:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1599231253; bh=8DCiIQT4QmRUyZL55BGyuiFf/ASSh3pGLjvV3qU7b0U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=axFOgXNUlouJbYTWKptFbEYpVM/XPIw17xVMzEkB/rDE3QaswnNrTWVqeJStS7myj Nex7r/CMeN+JhTLXeHLn4W43h1GVzGeTJcqIsycgfXIEBZIVuYfCNIYpTILSvIJu/u 1PMWepaBkTIANHbg0ODfKbitQhS7xKUfin3fS0b8= From: Krzysztof Kozlowski To: Rob Herring , David Airlie , Daniel Vetter , Lucas Stach , Russell King , Christian Gmeiner , Lee Jones , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Sam Ravnborg , Li Yang , Robert Chiras , Matti Vaittinen , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, etnaviv@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 09/13] arm64: dts: imx8mp-evk: Align pin configuration group names with schema Date: Fri, 4 Sep 2020 16:53:08 +0200 Message-Id: <20200904145312.10960-10-krzk@kernel.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200904145312.10960-1-krzk@kernel.org> References: <20200904145312.10960-1-krzk@kernel.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200904_105414_955216_CCA15F33 X-CRM114-Status: GOOD ( 13.28 ) X-Spam-Score: -5.2 (-----) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-5.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at https://www.dnswl.org/, high trust [198.145.29.99 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.0 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Krzysztof Kozlowski MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Device tree schema expects pin configuration groups to end with 'grp' suffix, otherwise dtbs_check complain with a warning like: ... 'usdhc3grp-100mhz', 'usdhc3grp-200mhz' do not match any of the regexes: 'grp$', 'pinctrl-[0-9]+' Signed-off-by: Krzysztof Kozlowski Reviewed-by: Lucas Stach --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index 3d535f1b3440..ad66f1286d95 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -157,7 +157,7 @@ >; }; - pinctrl_reg_usdhc2_vmmc: regusdhc2vmmc { + pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { fsl,pins = < MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41 >; @@ -182,7 +182,7 @@ >; }; - pinctrl_usdhc2_100mhz: usdhc2grp-100mhz { + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { fsl,pins = < MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 @@ -194,7 +194,7 @@ >; }; - pinctrl_usdhc2_200mhz: usdhc2grp-200mhz { + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { fsl,pins = < MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 @@ -206,7 +206,7 @@ >; }; - pinctrl_usdhc2_gpio: usdhc2grp-gpio { + pinctrl_usdhc2_gpio: usdhc2gpiogrp { fsl,pins = < MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 >; @@ -228,7 +228,7 @@ >; }; - pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { fsl,pins = < MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 @@ -244,7 +244,7 @@ >; }; - pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { fsl,pins = < MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6