| Message ID | 20200907083300.14412-2-narmstrong@baylibre.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: meson-axg-s400: add support for MIPI-DSI Panel | expand |
Hi Neil, On Mon, Sep 7, 2020 at 10:33 AM Neil Armstrong <narmstrong@baylibre.com> wrote: > > This add the display VPU node and the power controller PWRC node. s/add/adds/ > Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> [...] > + vpu: vpu@ff900000 { > + compatible = "amlogic,meson-axg-vpu"; > + reg = <0x0 0xff900000 0x0 0x100000>, > + <0x0 0xff63c000 0x0 0x1000>; my plan is to replace the "hhi" binding with a reference to the HHI syscon - but at the same time I'm not sure if it's a good idea (or whether for example CVBS support should be split off into a sub-driver which is then part of the HHI MFD syscon). maybe we can align at some point about the next steps with the the DRM driver (as I want to add support for the older gen SoCs still) that's nothing for this patch though Best regards, Martin
On 15/09/2020 21:50, Martin Blumenstingl wrote: > Hi Neil, > > On Mon, Sep 7, 2020 at 10:33 AM Neil Armstrong <narmstrong@baylibre.com> wrote: >> >> This add the display VPU node and the power controller PWRC node. > s/add/adds/ > >> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> > Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > > [...] >> + vpu: vpu@ff900000 { >> + compatible = "amlogic,meson-axg-vpu"; >> + reg = <0x0 0xff900000 0x0 0x100000>, >> + <0x0 0xff63c000 0x0 0x1000>; > my plan is to replace the "hhi" binding with a reference to the HHI > syscon - but at the same time I'm not sure if it's a good idea (or > whether for example CVBS support should be split off into a sub-driver > which is then part of the HHI MFD syscon). It's also my plan, yes until we get 100% rid of HHI access from DRM driver, we still need it. It you want to push it, please do it ! Neil > maybe we can align at some point about the next steps with the the DRM > driver (as I want to add support for the older gen SoCs still) > that's nothing for this patch though > > > Best regards, > Martin >
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b9efc8469265..4a93e3fecd90 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -12,6 +12,7 @@ #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> #include <dt-bindings/reset/amlogic,meson-axg-reset.h> +#include <dt-bindings/power/meson-axg-power.h> / { compatible = "amlogic,meson-axg"; @@ -187,6 +188,7 @@ "timing-adjustment"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; + power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>; status = "disabled"; }; @@ -1117,6 +1119,46 @@ clocks = <&xtal>; clock-names = "xtal"; }; + + pwrc: power-controller { + compatible = "amlogic,meson-axg-pwrc"; + #power-domain-cells = <1>; + amlogic,ao-sysctrl = <&sysctrl_AO>; + resets = <&reset RESET_VIU>, + <&reset RESET_VENC>, + <&reset RESET_VCBUS>, + <&reset RESET_VENCL>, + <&reset RESET_VID_LOCK>; + reset-names = "viu", "venc", "vcbus", + "vencl", "vid_lock"; + clocks = <&clkc CLKID_VPU>, + <&clkc CLKID_VAPB>; + clock-names = "vpu", "vapb"; + /* + * VPU clocking is provided by two identical clock paths + * VPU_0 and VPU_1 muxed to a single clock by a glitch + * free mux to safely change frequency while running. + * Same for VAPB but with a final gate after the glitch free mux. + */ + assigned-clocks = <&clkc CLKID_VPU_0_SEL>, + <&clkc CLKID_VPU_0>, + <&clkc CLKID_VPU>, /* Glitch free mux */ + <&clkc CLKID_VAPB_0_SEL>, + <&clkc CLKID_VAPB_0>, + <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */ + assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>, + <0>, /* Do Nothing */ + <&clkc CLKID_VPU_0>, + <&clkc CLKID_FCLK_DIV4>, + <0>, /* Do Nothing */ + <&clkc CLKID_VAPB_0>; + assigned-clock-rates = <0>, /* Do Nothing */ + <250000000>, + <0>, /* Do Nothing */ + <0>, /* Do Nothing */ + <250000000>, + <0>; /* Do Nothing */ + }; }; }; @@ -1563,6 +1605,22 @@ }; }; + vpu: vpu@ff900000 { + compatible = "amlogic,meson-axg-vpu"; + reg = <0x0 0xff900000 0x0 0x100000>, + <0x0 0xff63c000 0x0 0x1000>; + reg-names = "vpu", "hhi"; + interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>; + power-domains = <&pwrc PWRC_AXG_VPU_ID>; + #address-cells = <1>; + #size-cells = <0>; + + /* DPI output port */ + dpi_port: port@2 { + reg = <2>; + }; + }; + gic: interrupt-controller@ffc01000 { compatible = "arm,gic-400"; reg = <0x0 0xffc01000 0 0x1000>,
This add the display VPU node and the power controller PWRC node. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 58 ++++++++++++++++++++++ 1 file changed, 58 insertions(+)