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Mon, 7 Sep 2020 09:52:19 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Mon, 7 Sep 2020 09:52:19 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Mon, 7 Sep 2020 09:52:19 -0500 Received: from lta0400828a.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 087EqEEM010923; Mon, 7 Sep 2020 09:52:17 -0500 From: Roger Quadros To: , Subject: [PATCH v2 1/6] dt-bindings: mux-j7200-wiz: Add lane function defines Date: Mon, 7 Sep 2020 17:52:08 +0300 Message-ID: <20200907145213.30788-2-rogerq@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200907145213.30788-1-rogerq@ti.com> References: <20200907145213.30788-1-rogerq@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200907_105224_929185_2A4DA246 X-CRM114-Status: GOOD ( 12.92 ) X-Spam-Score: -2.6 (--) X-Spam-Report: SpamAssassin version 3.4.4 on merlin.infradead.org summary: Content analysis details: (-2.6 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at https://www.dnswl.org/, medium trust [198.47.19.141 listed in list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIMWL_WL_HIGH DKIMwl.org - Whitelisted High sender X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, nsekhar@ti.com, linux-kernel@vger.kernel.org, kishon@ti.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, Roger Quadros Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org Each SERDES lane mux can select upto 4 different IPs. There are 4 lanes in each J7200 SERDES. Define all the possible functions in this file. Signed-off-by: Roger Quadros --- include/dt-bindings/mux/mux-j7200-wiz.h | 29 +++++++++++++++++++++++++ 1 file changed, 29 insertions(+) create mode 100644 include/dt-bindings/mux/mux-j7200-wiz.h diff --git a/include/dt-bindings/mux/mux-j7200-wiz.h b/include/dt-bindings/mux/mux-j7200-wiz.h new file mode 100644 index 000000000000..b091b1185a36 --- /dev/null +++ b/include/dt-bindings/mux/mux-j7200-wiz.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * This header provides constants for J7200 WIZ. + */ + +#ifndef _DT_BINDINGS_J7200_WIZ +#define _DT_BINDINGS_J7200_WIZ + +#define SERDES0_LANE0_QSGMII_LANE3 0x0 +#define SERDES0_LANE0_PCIE1_LANE0 0x1 +#define SERDES0_LANE0_IP3_UNUSED 0x2 +#define SERDES0_LANE0_IP4_UNUSED 0x3 + +#define SERDES0_LANE1_QSGMII_LANE4 0x0 +#define SERDES0_LANE1_PCIE1_LANE1 0x1 +#define SERDES0_LANE1_IP3_UNUSED 0x2 +#define SERDES0_LANE1_IP4_UNUSED 0x3 + +#define SERDES0_LANE2_QSGMII_LANE1 0x0 +#define SERDES0_LANE2_PCIE1_LANE2 0x1 +#define SERDES0_LANE2_IP3_UNUSED 0x2 +#define SERDES0_LANE2_IP4_UNUSED 0x3 + +#define SERDES0_LANE3_QSGMII_LANE2 0x0 +#define SERDES0_LANE3_PCIE1_LANE3 0x1 +#define SERDES0_LANE3_USB 0x2 +#define SERDES0_LANE3_IP4_UNUSED 0x3 + +#endif /* _DT_BINDINGS_J7200_WIZ */