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Thu, 10 Sep 2020 06:54:51 -0400 (EDT) From: Andrew Jeffery To: linux-mmc@vger.kernel.org Subject: [PATCH 1/3] dt: bindings: mmc: Add phase control properties for the Aspeed SDHCI Date: Thu, 10 Sep 2020 20:24:38 +0930 Message-Id: <20200910105440.3087723-2-andrew@aj.id.au> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200910105440.3087723-1-andrew@aj.id.au> References: <20200910105440.3087723-1-andrew@aj.id.au> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200910_065456_152122_1B8527E1 X-CRM114-Status: UNSURE ( 9.90 ) X-CRM114-Notice: Please train this message. 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Signed-off-by: Andrew Jeffery --- Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml index 987b287f3bff..75effd411554 100644 --- a/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/aspeed,sdhci.yaml @@ -61,6 +61,14 @@ patternProperties: sdhci,auto-cmd12: type: boolean description: Specifies that controller should use auto CMD12 + "aspeed,input-phase": + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + The input clock phase delay value. + "aspeed,output-phase": + $ref: '/schemas/types.yaml#/definitions/uint32' + description: + The output clock phase delay value. required: - compatible - reg